This is my first post, so I am not sure if it is done like this.
I have some problems executing ptp4l. I am using the xilinx_emaclite driver
for the MAC and the DP83640 driver for the PHY. However, when I execute the
ptp4l i get the following:
# ./ptp4l -i eth0 -p /dev/ptp0 -m -l 6 -2 -E
ptp4l[1637.250]: selected /dev/ptp0 as PTP clock
ptp4l[1637.340]: driver rejected most general HWTSTAMP filter
ptp4l[1637.340]: ioctl SIOCSHWTSTAMP failed: Operation not supported
ptp4l[1637.400]: port 1: INITIALIZING to FAULTY on INITIALIZE
ptp4l[1637.400]: port 0: INITIALIZING to LISTENING on INITIALIZE
ptp4l[1637.401]: port 1: link down
I have examined the xilinx_emaclite driver and it does not have ioctl
function implemented and neither the
SIOCSHWTSTAMP. However, in the main README it says that the emaclite
driver is compatible with PTP4L with PHY level hardware time stamping (emaclite
Xilinx Ethernet Lite 3.1 Y ).
# ./hwstamp_ctl -i eth0
Device driver does not have support for non-destructive SIOCGHWTSTAMP.
# ./ethtool -T eth0
Time stamping parameters for eth0:
Capabilities:
hardware-transmit (SOF_TIMESTAMPING_TX_HARDWARE)
hardware-receive (SOF_TIMESTAMPING_RX_HARDWARE)
hardware-raw-clock (SOF_TIMESTAMPING_RAW_HARDWARE)
PTP Hardware Clock: 0
Hardware Transmit Timestamp Modes:
off (HWTSTAMP_TX_OFF)
on (HWTSTAMP_TX_ON)
one-step-sync (HWTSTAMP_TX_ONESTEP_SYNC)
Hardware Receive Filter Modes:
none (HWTSTAMP_FILTER_NONE)
ptpv1-l4-event (HWTSTAMP_FILTER_PTP_V1_L4_EVENT)
ptpv2-l4-event (HWTSTAMP_FILTER_PTP_V2_L4_EVENT)
ptpv2-l2-event (HWTSTAMP_FILTER_PTP_V2_L2_EVENT)
ptpv2-event (HWTSTAMP_FILTER_PTP_V2_EVENT)
# ./phc_ctl /dev/ptp0
phc_ctl[5264.357]:
capabilities:
1953124 maximum frequency adjustment (ppb)
0 programable alarms
6 external time stamp channels
7 programmable periodic signals
doesn't have pulse per second support
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