This patch set is to add linuxptp bond fail over support.
The main idea is get bond's active slave interface via rtnl socket and store
it in struct interface.
When active interface changed, we update the port phc index and switch to
new phc on clock.
After we get true ts interface, we need to use this interface in
sk_timestamping_init() in transport_open().
Also we need update clock and phc_index in phc2sys.
---
v3 -> v4:
1. In [PATCHv3 04/10] rtnl: update function rtnl_link_status to get bond slave
info
- Make function rtnl_nested_rtattr_parse() static inline
- Check type < max in function rtnl_rtattr_parse()
2. In [PATCHv3 08/10] ptp4l: use ts label to get ts info
- In previous patch we only updated phc index when ts_label changed. But
actually link down and up may also change the phc index. So in this new
version we will check both states and update phc index when it changed.
- Call clock_sync_interval() after clock_switch_phc()
3. In [PATCHv3 10/10] phc2sys: update clock clkid and phc_index if device
changed
- In clock_reinit(), we need to check phc index even clock->device not
changed because device down and up will also cause phc index change.
- In reconfigure(), we also need to reinit clock when new_state is PS_SLAVE
because there may have bond failover on slave.
v2 -> v3:
1. Change the ts_iface to ts_label
2. Separate the original fourth patch "rtnl: add function rtnl_link_info"
into two parts. The first part is update function rtnl_link_status to
get bond slave info. And the second part add the new function
rtnl_get_ts_label() to get interface ts_label info.
3. update port link_status to enum
4. Some small fixes.
v1 -> v2:
1. After the rtnl per port update, now we update ts_iface info in
port_link_status().
2. Fix port_dispatch event flood when change ts_iface info. This issue
only happen with bond interface when fail over. Normal ethernet
interface do not have this problem.
---
Test with bond failover on Slave.
ptp4l[1748483.379]: master offset -47 s2 freq -94594 path delay
1182
ptp4l[1748484.379]: master offset 0 s2 freq -94561 path delay
1181
ptp4l[1748485.379]: master offset 16 s2 freq -94545 path delay
1181
ptp4l[1748486.379]: master offset 101 s2 freq -94455 path delay
1174
ptp4l[1748486.833]: port 1: ts label changed to p7p1
ptp4l[1748486.833]: port 1: SLAVE to FAULTY on FAULT_DETECTED (FT_UNSPECIFIED)
ptp4l[1748513.435]: port 1: FAULTY to LISTENING on INIT_COMPLETE
ptp4l[1748514.368]: port 1: new foreign master 90e2ba.fffe.862e70-1
ptp4l[1748514.380]: clockcheck: clock jumped backward or running slower than
expected!
ptp4l[1748518.369]: selected best master clock 90e2ba.fffe.862e70
ptp4l[1748518.369]: port 1: LISTENING to UNCALIBRATED on RS_SLAVE
ptp4l[1748518.380]: master offset -37104557373 s0 freq +0 path delay
1174
ptp4l[1748519.380]: master offset -37104651844 s1 freq -94480 path delay
1174
ptp4l[1748520.380]: master offset -14 s2 freq -94494 path delay
1174
ptp4l[1748520.380]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED
ptp4l[1748521.380]: master offset -88 s2 freq -94572 path delay
1174
ptp4l[1748522.380]: master offset -46 s2 freq -94556 path delay
1174
ptp4l[1748523.380]: master offset -27 s2 freq -94551 path delay
1169
ptp4l[1748524.380]: master offset 31 s2 freq -94501 path delay
1169
ptp4l[1748525.380]: master offset -64 s2 freq -94587 path delay
1169
ptp4l[1748526.380]: master offset -13 s2 freq -94555 path delay
1166
ptp4l[1748527.380]: master offset 23 s2 freq -94523 path delay
1160
ptp4l[1748528.380]: master offset 44 s2 freq -94495 path delay
1160
ptp4l[1748529.380]: master offset 7 s2 freq -94519 path delay
1166
phc2sys[1748483.286]: CLOCK_REALTIME phc offset 0 s2 freq -8043 delay
851
phc2sys[1748484.286]: CLOCK_REALTIME phc offset -27 s2 freq -8070 delay
986
phc2sys[1748485.286]: CLOCK_REALTIME phc offset -26 s2 freq -8077 delay
848
phc2sys[1748486.287]: CLOCK_REALTIME phc offset 37 s2 freq -8022 delay
983
phc2sys[1748487.287]: port 90e2ba.fffe.8675f4-1 changed state
phc2sys[1748487.287]: reconfiguring after port state change
phc2sys[1748487.287]: selecting p7p2 for synchronization
phc2sys[1748487.287]: nothing to synchronize
phc2sys[1748519.290]: port 90e2ba.fffe.8675f4-1 changed state
phc2sys[1748519.290]: reconfiguring after port state change
phc2sys[1748519.290]: master clock not ready, waiting...
phc2sys[1748521.290]: port 90e2ba.fffe.8675f4-1 changed state
phc2sys[1748521.290]: reconfiguring after port state change
phc2sys[1748521.290]: selecting CLOCK_REALTIME for synchronization
phc2sys[1748521.290]: selecting p7p1 as the master clock
phc2sys[1748521.290]: CLOCK_REALTIME phc offset -290 s2 freq -8337 delay
844
phc2sys[1748522.290]: CLOCK_REALTIME phc offset -16 s2 freq -8150 delay
967
phc2sys[1748523.291]: CLOCK_REALTIME phc offset 75 s2 freq -8064 delay
840
phc2sys[1748524.291]: CLOCK_REALTIME phc offset 71 s2 freq -8046 delay
838
Thanks
Hangbin
Hangbin Liu (10):
config: add new element ts_label in struct interface
port: track interface info in port
rtnl: update rtgenmsg to ifinfomsg when request link info
rtnl: update function rtnl_link_status to get bond slave info
rtnl: add function rtnl_get_ts_label to get interface ts_label info
port: update port link_status to enum
clock: add clock_required_modes to obtain the required time stamping
mode
ptp4l: use ts label to get ts info
transport: pass struct interface to transport_open
phc2sys: update clock clkid and phc_index if device changed
clock.c | 63 +++++++++++++++++-------
clock.h | 8 +++
config.c | 1 -
config.h | 1 +
phc2sys.c | 60 +++++++++++++++++++++--
pmc_common.c | 5 +-
port.c | 84 ++++++++++++++++++++++++++------
raw.c | 5 +-
rtnl.c | 138 ++++++++++++++++++++++++++++++++++++++++++++++------
rtnl.h | 28 +++++++----
transport.c | 4 +-
transport.h | 3 +-
transport_private.h | 4 +-
udp.c | 7 +--
udp6.c | 7 +--
uds.c | 3 +-
16 files changed, 344 insertions(+), 77 deletions(-)
--
2.5.5
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