On Tue, Jun 11, 2019 at 09:44:32AM -0400, Sanjay Bhandari wrote: > > What I don't understand is how is your FPGA different from a NIC. In both > cases there is a clock which is timestamping packets and PPS on an input > pin, right? > > Correct. I may have overstated the case for WHERE the hardware timestamping > happens (in the NIC or elsewhere). The real issue is about what needs to > happen afterwards. The offsets need to be used to train the PHC clock. And > the chrony SOCK refclock like mechanism was one option. But I think you are > suggesting that the samples can be fed through an ioctl instead. Am I > reading you correctly?
Yes. The ioctl provides an API for configuring the PHC to timestamp events of a signal like PPS. To me it sounds like that's exactly what your FPGA is doing. -- Miroslav Lichvar _______________________________________________ Linuxptp-devel mailing list Linuxptp-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/linuxptp-devel
