Richard Cochran wrote: > On Tue, Apr 18, 2017 at 12:54:23PM -0700, Wolfgang Hennig wrote: >> I'm working on a project where a Xilinx Zynq uses a DP83640 (eval board) as >> the Ethernet PHY. I'm running Ubuntu/Linaro 15 on the Zynq's ARM processor >> and successfully modified kernel options and compiled/installed LinuxPTP to >> synchronize time over the network. Now I would like to use the DP83640's >> configurable reference clock (output on a GPIO pin) to clock logic in the >> FPGA section of the Zynq. To do that I would need to read/write the >> DP83640's internal registers, but I don't know how. >> >> It seems that there is some functionality in setting the registers in >> dp83640.c. In an earlier post in this list: > We don't have any support for enabling the clock output. You can hack > this in using something like this: > > ext_write(0, phydev, PAGE6, PTP_COC, coc); That worked pretty well. I put it in dp838640_config_init (as a first test). > >> I should add that I did not (yet) find where/how to modify the xemacps >> driver per https://lwn.net/Articles/392150/ >>> 1. Before mdio_register, add >>> bus->locktype = MDIOBUS_ATOMIC_RW; >>> 2. In the .ndo_start_xmit function, add >>> skb_tx_timestamp() >>> 3. In the NAPI poll function, add >>> skb_rx_timestamp() > That info is obsolete. All you need is a MAC driver that uses phylib > and calls skb_tx_timestamp(). > >> and so the HW timestamping might have been provided by the Zynq's build in >> TSU instead of the DP83640. How would you tell? > If your Zynq driver implements time stamping or PHC, then you should > disable or remove that code. There was definitely an issue there. Three changes in/for the xemacps driver were required: 1) turn off option CONFIG_XILINX_PS_EMAC_HWTSTAMP for the kernel compile 2) in ~line 2800 of xilinx_emacps.c, function xemacps_ioctl, add the #else section below so that it responds with the PHY's HW timestamping capabilities when queried by ptp4l. (Interestingly, ethtool -T always reports the PHY's capabilities) switch (cmd) { case SIOCGMIIPHY: case SIOCGMIIREG: case SIOCSMIIREG: return phy_mii_ioctl(phydev, rq, cmd); #ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP case SIOCSHWTSTAMP: return xemacps_hwtstamp_ioctl(ndev, rq, cmd); #else case SIOCSHWTSTAMP: return phy_mii_ioctl(phydev, rq, cmd); #endif 3) I added skb_tx_timestamp(skb) in line 2256 of xilinx_emacps.c, before the for loop over nr_frags. Seems to work, didn't experiment with other locations.
I now get offsets from master of about 100ns through our local network and <10ns when connecting 2 boards back to back. The DP83640's CLK_OUT signals are pretty well synchronized (looking at an oscilloscope I see the edges drifting by about 10ns relative to each other). Thank you very much for the hints, Richard, that was very helpful. Wolfgang > > BTW you can check sysfs to see the PHC device names: > > What: /sys/class/ptp/ptpN/clock_name > Description: > This file contains the name of the PTP hardware clock > as a human readable string. The purpose of this > attribute is to provide the user with a "friendly > name" and to help distinguish PHY based devices from > MAC based ones. The string does not necessarily have > to be any kind of unique id. > > >> Does it matter where in the >> function one adds skb_tx_timestamp()? > See the comment in include/linux/skbuff.h. > > Thanks, > Richard -- Wolfgang Hennig, Ph.D. XIA LLC 31057 Genstar Rd. Hayward CA 94544 ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ Linuxptp-users mailing list Linuxptp-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/linuxptp-users
