On Wed Jun 11 19:37:13 2025 +0100, Dave Stevenson wrote:
> Adds register setups for running the CSI lanes at 972Mbit/s,
> which allows 1080P50 UYVY down 2 lanes.
> 
> Signed-off-by: Dave Stevenson <dave.steven...@raspberrypi.com>
> Signed-off-by: Hans Verkuil <hverk...@xs4all.nl>

Patch committed.

Thanks,
Hans Verkuil

 drivers/media/i2c/tc358743.c | 48 +++++++++++++++++++++++++++++++-------------
 1 file changed, 34 insertions(+), 14 deletions(-)

---

diff --git a/drivers/media/i2c/tc358743.c b/drivers/media/i2c/tc358743.c
index 3d6703b75bfa..b87db3de20db 100644
--- a/drivers/media/i2c/tc358743.c
+++ b/drivers/media/i2c/tc358743.c
@@ -1993,6 +1993,7 @@ static int tc358743_probe_of(struct tc358743_state *state)
        /*
         * The CSI bps per lane must be between 62.5 Mbps and 1 Gbps.
         * The default is 594 Mbps for 4-lane 1080p60 or 2-lane 720p60.
+        * 972 Mbps allows 1080P50 UYVY over 2-lane.
         */
        bps_pr_lane = 2 * endpoint.link_frequencies[0];
        if (bps_pr_lane < 62500000U || bps_pr_lane > 1000000000U) {
@@ -2006,23 +2007,42 @@ static int tc358743_probe_of(struct tc358743_state 
*state)
                               state->pdata.refclk_hz * state->pdata.pll_prd;
 
        /*
-        * FIXME: These timings are from REF_02 for 594 Mbps per lane (297 MHz
-        * link frequency). In principle it should be possible to calculate
+        * FIXME: These timings are from REF_02 for 594 or 972 Mbps per lane
+        * (297 MHz or 486 MHz link frequency).
+        * In principle it should be possible to calculate
         * them based on link frequency and resolution.
         */
-       if (bps_pr_lane != 594000000U)
+       switch (bps_pr_lane) {
+       default:
                dev_warn(dev, "untested bps per lane: %u bps\n", bps_pr_lane);
-       state->pdata.lineinitcnt = 0xe80;
-       state->pdata.lptxtimecnt = 0x003;
-       /* tclk-preparecnt: 3, tclk-zerocnt: 20 */
-       state->pdata.tclk_headercnt = 0x1403;
-       state->pdata.tclk_trailcnt = 0x00;
-       /* ths-preparecnt: 3, ths-zerocnt: 1 */
-       state->pdata.ths_headercnt = 0x0103;
-       state->pdata.twakeup = 0x4882;
-       state->pdata.tclk_postcnt = 0x008;
-       state->pdata.ths_trailcnt = 0x2;
-       state->pdata.hstxvregcnt = 0;
+               fallthrough;
+       case 594000000U:
+               state->pdata.lineinitcnt = 0xe80;
+               state->pdata.lptxtimecnt = 0x003;
+               /* tclk-preparecnt: 3, tclk-zerocnt: 20 */
+               state->pdata.tclk_headercnt = 0x1403;
+               state->pdata.tclk_trailcnt = 0x00;
+               /* ths-preparecnt: 3, ths-zerocnt: 1 */
+               state->pdata.ths_headercnt = 0x0103;
+               state->pdata.twakeup = 0x4882;
+               state->pdata.tclk_postcnt = 0x008;
+               state->pdata.ths_trailcnt = 0x2;
+               state->pdata.hstxvregcnt = 0;
+               break;
+       case 972000000U:
+               state->pdata.lineinitcnt = 0x1b58;
+               state->pdata.lptxtimecnt = 0x007;
+               /* tclk-preparecnt: 6, tclk-zerocnt: 40 */
+               state->pdata.tclk_headercnt = 0x2806;
+               state->pdata.tclk_trailcnt = 0x00;
+               /* ths-preparecnt: 6, ths-zerocnt: 8 */
+               state->pdata.ths_headercnt = 0x0806;
+               state->pdata.twakeup = 0x4268;
+               state->pdata.tclk_postcnt = 0x008;
+               state->pdata.ths_trailcnt = 0x5;
+               state->pdata.hstxvregcnt = 0;
+               break;
+       }
 
        state->reset_gpio = devm_gpiod_get_optional(dev, "reset",
                                                    GPIOD_OUT_LOW);

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