On Mon Nov 3 19:45:54 2025 +0000, Lad Prabhakar wrote:
> Update the FCP DT schema to permit three clock inputs for the RZ/V2N SoC.
> The FCP block on this SoC requires three separate clocks, unlike other
> variants which use only one.
>
> Fixes: f42eddf44fbf ("media: dt-bindings: media: renesas,fcp: Document RZ/V2N
> SoC")
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Laurent Pinchart <[email protected]>
> Acked-by: Conor Dooley <[email protected]>
> Link:
> https://patch.msgid.link/[email protected]
> Signed-off-by: Laurent Pinchart <[email protected]>
> Signed-off-by: Hans Verkuil <[email protected]>
Patch committed.
Thanks,
Hans Verkuil
Documentation/devicetree/bindings/media/renesas,fcp.yaml | 1 +
1 file changed, 1 insertion(+)
---
diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.yaml
b/Documentation/devicetree/bindings/media/renesas,fcp.yaml
index cf92dfe69637..b5eff6fec8a9 100644
--- a/Documentation/devicetree/bindings/media/renesas,fcp.yaml
+++ b/Documentation/devicetree/bindings/media/renesas,fcp.yaml
@@ -77,6 +77,7 @@ allOf:
- renesas,r9a07g043u-fcpvd
- renesas,r9a07g044-fcpvd
- renesas,r9a07g054-fcpvd
+ - renesas,r9a09g056-fcpvd
- renesas,r9a09g057-fcpvd
then:
properties:
_______________________________________________
linuxtv-commits mailing list -- [email protected]
To unsubscribe send an email to [email protected]
