omjavaid added a comment. Some minor typos inline comments.
I havnt applied nd tested this patch. Are you able to read these registers, i guess you need to generate neon or vfp code to test all registers properly. There no arm register test to my knowledge currently in testsuite we can put this as a future todo to verify we are writing and reading properly. ================ Comment at: source/Plugins/Process/Utility/RegisterInfos_arm.h:316 @@ +315,3 @@ +static uint32_t g_q5_contains[] = { fpu_d10, fpu_d11, fpu_s20, fpu_s21, fpu_s22, fpu_s23, LLDB_INVALID_REGNUM }; +static uint32_t g_q6_contains[] = { fpu_d12, fpu_d13, fpu_s24, fpu_s25, fpu_s24, fpu_s27, LLDB_INVALID_REGNUM }; +static uint32_t g_q7_contains[] = { fpu_d14, fpu_d15, fpu_s28, fpu_s29, fpu_s28, fpu_s31, LLDB_INVALID_REGNUM }; ---------------- here fpu_s24 is being repeated twice instead of fpu_s26. ================ Comment at: source/Plugins/Process/Utility/RegisterInfos_arm.h:317 @@ +316,3 @@ +static uint32_t g_q6_contains[] = { fpu_d12, fpu_d13, fpu_s24, fpu_s25, fpu_s24, fpu_s27, LLDB_INVALID_REGNUM }; +static uint32_t g_q7_contains[] = { fpu_d14, fpu_d15, fpu_s28, fpu_s29, fpu_s28, fpu_s31, LLDB_INVALID_REGNUM }; +static uint32_t g_q8_contains[] = { fpu_d16, fpu_d17, LLDB_INVALID_REGNUM }; ---------------- here fpu_s28 is being repeated twice instead of fpu_s30. http://reviews.llvm.org/D14985 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits