Hi Tamas Yes, it was a bug in clang that I had submitted some months ago (ID: 23491) and it was fixed. But the fix is not present in clang 3.5/3.6. Hence, the failure is occurring.
Thanks & Regards Abhishek Aggarwal From: Tamas Berghammer [mailto:tbergham...@google.com] Sent: Wednesday, December 2, 2015 2:41 PM To: Aggarwal, Abhishek A <abhishek.a.aggar...@intel.com>; lldb-commits@lists.llvm.org Subject: Re: [Lldb-commits] [lldb] r254499 - PTRACE ABI to read FXSAVE area for 32-bit inferior Hi Abhishek, After this change TestReturnValue.py is failing on Linux with i386 inferior when compiling the inferior with clang-3.5 (it passes with gcc and with ToT clang). I marked the test XFAIL for that specific configuration to get the buildbot green but can you take a look? My suspicion is that clang 3.5 and 3.6 uses an incorrect ABI for returning small structs from functions (returning it in register instead of in memory pointed by a register) what causing the issue but I am not certain. Thanks, Tamas On Wed, Dec 2, 2015 at 9:43 AM Abhishek Aggarwal via lldb-commits <lldb-commits@lists.llvm.org<mailto:lldb-commits@lists.llvm.org>> wrote: Author: abhishek Date: Wed Dec 2 03:40:17 2015 New Revision: 254499 URL: http://llvm.org/viewvc/llvm-project?rev=254499&view=rev Log: PTRACE ABI to read FXSAVE area for 32-bit inferior Summary: - Problem occurs when: -- 32-bit inferiors run on x86_32 machine and the architecture doesn't have AVX feature -- This causes FPRType to be set to eFPRTypeFXSAVE -- PTRACE_GETFPREGS was being used to read FXSAVE area -- For 32-bit inferiors running on x86_32 machine, PTRACE_GETFPREGS reads FSAVE area and not FXSAVE area - Changed ptrace API to PTRACE_GETREGSET for 32-bit inferiors -- This reads FPR data in FXSAVE format. -- For 64-bit inferiors, no change has been made. - Modified XFAIL for TestReturnValue.py -- Earlier, this test was passing for Linux OS -- Now, it passes for Android OS as well Change-Id: Ieed72bc969b79516fc7b263b32493aa1e7a1a2ac Signed-off-by: Abhishek Aggarwal <abhishek.a.aggar...@intel.com<mailto:abhishek.a.aggar...@intel.com>> Reviewers: ovyalov, jingham, lldb-commits, tberghammer, labath Subscribers: jevinskie, labath, tberghammer, danalbert Differential Revision: http://reviews.llvm.org/D15042 Modified: lldb/trunk/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp Modified: lldb/trunk/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py?rev=254499&r1=254498&r2=254499&view=diff ============================================================================== --- lldb/trunk/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py (original) +++ lldb/trunk/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py Wed Dec 2 03:40:17 2015 @@ -16,7 +16,7 @@ class ReturnValueTestCase(TestBase): mydir = TestBase.compute_mydir(__file__) - @expectedFailurei386 + @expectedFailureAll(oslist=["macosx","freebsd"], archs=["i386"]) @expectedFailureWindows("llvm.org/pr24778<http://llvm.org/pr24778>") @add_test_categories(['pyapi']) def test_with_python(self): Modified: lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp?rev=254499&r1=254498&r2=254499&view=diff ============================================================================== --- lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp (original) +++ lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp Wed Dec 2 03:40:17 2015 @@ -327,6 +327,9 @@ namespace #ifndef NT_X86_XSTATE #define NT_X86_XSTATE 0x202 #endif +#ifndef NT_PRXFPREG +#define NT_PRXFPREG 0x46e62b7f +#endif NativeRegisterContextLinux* NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(const ArchSpec& target_arch, @@ -832,6 +835,7 @@ NativeRegisterContextLinux_x86_64::IsGPR NativeRegisterContextLinux_x86_64::FPRType NativeRegisterContextLinux_x86_64::GetFPRType () const { + Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_PROCESS)); if (m_fpr_type == eFPRTypeNotValid) { // TODO: Use assembly to call cpuid on the inferior and query ebx or ecx. @@ -842,9 +846,15 @@ NativeRegisterContextLinux_x86_64::GetFP { // Fall back to general floating point with no AVX support. m_fpr_type = eFPRTypeFXSAVE; + + // Check if FXSAVE area can be read. + if (const_cast<NativeRegisterContextLinux_x86_64*>(this)->ReadFPR().Fail()) + { + if (log) + log->Printf("NativeRegisterContextLinux_x86_64::%s ptrace APIs failed to read XSAVE/FXSAVE area", __FUNCTION__); + } } } - return m_fpr_type; } @@ -868,10 +878,24 @@ Error NativeRegisterContextLinux_x86_64::WriteFPR() { const FPRType fpr_type = GetFPRType (); + const lldb_private::ArchSpec& target_arch = GetRegisterInfoInterface().GetTargetArchitecture(); switch (fpr_type) { case FPRType::eFPRTypeFXSAVE: - return NativeRegisterContextLinux::WriteFPR(); + // For 32-bit inferiors on x86_32/x86_64 architectures, + // FXSAVE area can be written using PTRACE_SETREGSET ptrace api + // For 64-bit inferiors on x86_64 architectures, + // FXSAVE area can be written using PTRACE_SETFPREGS ptrace api + switch (target_arch.GetMachine ()) + { + case llvm::Triple::x86: + return WriteRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_PRXFPREG); + case llvm::Triple::x86_64: + return NativeRegisterContextLinux::WriteFPR(); + default: + assert(false && "Unhandled target architecture."); + break; + } case FPRType::eFPRTypeXSAVE: return WriteRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_X86_XSTATE); default: @@ -980,10 +1004,24 @@ Error NativeRegisterContextLinux_x86_64::ReadFPR () { const FPRType fpr_type = GetFPRType (); + const lldb_private::ArchSpec& target_arch = GetRegisterInfoInterface().GetTargetArchitecture(); switch (fpr_type) { case FPRType::eFPRTypeFXSAVE: - return NativeRegisterContextLinux::ReadFPR(); + // For 32-bit inferiors on x86_32/x86_64 architectures, + // FXSAVE area can be read using PTRACE_GETREGSET ptrace api + // For 64-bit inferiors on x86_64 architectures, + // FXSAVE area can be read using PTRACE_GETFPREGS ptrace api + switch (target_arch.GetMachine ()) + { + case llvm::Triple::x86: + return ReadRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_PRXFPREG); + case llvm::Triple::x86_64: + return NativeRegisterContextLinux::ReadFPR(); + default: + assert(false && "Unhandled target architecture."); + break; + } case FPRType::eFPRTypeXSAVE: return ReadRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_X86_XSTATE); default: _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org<mailto:lldb-commits@lists.llvm.org> http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits Intel Deutschland GmbH Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Christian Lamprechter Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928
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