Author: Hemang Gadhavi Date: 2026-01-08T15:21:40+05:30 New Revision: efe6aaeeed0fcfcc101b3df61a041a54a3722374
URL: https://github.com/llvm/llvm-project/commit/efe6aaeeed0fcfcc101b3df61a041a54a3722374 DIFF: https://github.com/llvm/llvm-project/commit/efe6aaeeed0fcfcc101b3df61a041a54a3722374.diff LOG: [lldb][AIX] Added base file for AIX Register Context PPC64 (#173239) This PR is in reference to porting LLDB on AIX. Link to discussions on llvm discourse and github: 1. https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640 2. https://github.com/llvm/llvm-project/issues/101657 The complete changes for porting are present in this draft PR: https://github.com/llvm/llvm-project/pull/102601 - Added skeleton for AIX Registercontext PPC64 file. (The implementation will be added later.) (Ref: Registers details **https://www.ibm.com/docs/en/aix/7.3.0?topic=convention-linkage-overview** Added: lldb/source/Plugins/Process/AIX/NativeRegisterContextAIX_ppc64.cpp lldb/source/Plugins/Process/AIX/NativeRegisterContextAIX_ppc64.h Modified: lldb/source/Plugins/Process/AIX/CMakeLists.txt lldb/source/Plugins/Process/Utility/RegisterInfos_ppc64.h lldb/source/Plugins/Process/Utility/lldb-ppc64-register-enums.h lldb/source/Utility/PPC64_DWARF_Registers.h Removed: ################################################################################ diff --git a/lldb/source/Plugins/Process/AIX/CMakeLists.txt b/lldb/source/Plugins/Process/AIX/CMakeLists.txt index 3a6d9ec118e60..f1f9121822736 100644 --- a/lldb/source/Plugins/Process/AIX/CMakeLists.txt +++ b/lldb/source/Plugins/Process/AIX/CMakeLists.txt @@ -2,6 +2,7 @@ add_lldb_library(lldbPluginProcessAIX NativeProcessAIX.cpp NativeThreadAIX.cpp NativeRegisterContextAIX.cpp + NativeRegisterContextAIX_ppc64.cpp LINK_COMPONENTS Support diff --git a/lldb/source/Plugins/Process/AIX/NativeRegisterContextAIX_ppc64.cpp b/lldb/source/Plugins/Process/AIX/NativeRegisterContextAIX_ppc64.cpp new file mode 100644 index 0000000000000..aba785753055c --- /dev/null +++ b/lldb/source/Plugins/Process/AIX/NativeRegisterContextAIX_ppc64.cpp @@ -0,0 +1,169 @@ +//===------ NativeRegisterContextAIX_ppc64.cpp ----------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#if defined(__powerpc64__) + +#include "NativeRegisterContextAIX_ppc64.h" + +using namespace lldb; +using namespace lldb_private; +using namespace lldb_private::process_aix; + +static const uint32_t g_gpr_regnums_ppc64[] = { + gpr_r0_ppc64, gpr_r1_ppc64, gpr_r2_ppc64, gpr_r3_ppc64, + gpr_r4_ppc64, gpr_r5_ppc64, gpr_r6_ppc64, gpr_r7_ppc64, + gpr_r8_ppc64, gpr_r9_ppc64, gpr_r10_ppc64, gpr_r11_ppc64, + gpr_r12_ppc64, gpr_r13_ppc64, gpr_r14_ppc64, gpr_r15_ppc64, + gpr_r16_ppc64, gpr_r17_ppc64, gpr_r18_ppc64, gpr_r19_ppc64, + gpr_r20_ppc64, gpr_r21_ppc64, gpr_r22_ppc64, gpr_r23_ppc64, + gpr_r24_ppc64, gpr_r25_ppc64, gpr_r26_ppc64, gpr_r27_ppc64, + gpr_r28_ppc64, gpr_r29_ppc64, gpr_r30_ppc64, gpr_r31_ppc64, + gpr_cr_ppc64, gpr_msr_ppc64, gpr_xer_ppc64, gpr_lr_ppc64, + gpr_ctr_ppc64, gpr_pc_ppc64, + LLDB_INVALID_REGNUM // register sets need to end with this flag +}; + +static const uint32_t g_fpr_regnums_ppc64[] = { + fpr_f0_ppc64, fpr_f1_ppc64, fpr_f2_ppc64, fpr_f3_ppc64, + fpr_f4_ppc64, fpr_f5_ppc64, fpr_f6_ppc64, fpr_f7_ppc64, + fpr_f8_ppc64, fpr_f9_ppc64, fpr_f10_ppc64, fpr_f11_ppc64, + fpr_f12_ppc64, fpr_f13_ppc64, fpr_f14_ppc64, fpr_f15_ppc64, + fpr_f16_ppc64, fpr_f17_ppc64, fpr_f18_ppc64, fpr_f19_ppc64, + fpr_f20_ppc64, fpr_f21_ppc64, fpr_f22_ppc64, fpr_f23_ppc64, + fpr_f24_ppc64, fpr_f25_ppc64, fpr_f26_ppc64, fpr_f27_ppc64, + fpr_f28_ppc64, fpr_f29_ppc64, fpr_f30_ppc64, fpr_f31_ppc64, + fpr_fpscr_ppc64, + LLDB_INVALID_REGNUM // register sets need to end with this flag +}; + +static const uint32_t g_vmx_regnums_ppc64[] = { + vmx_vr0_ppc64, vmx_vr1_ppc64, vmx_vr2_ppc64, vmx_vr3_ppc64, + vmx_vr4_ppc64, vmx_vr5_ppc64, vmx_vr6_ppc64, vmx_vr7_ppc64, + vmx_vr8_ppc64, vmx_vr9_ppc64, vmx_vr10_ppc64, vmx_vr11_ppc64, + vmx_vr12_ppc64, vmx_vr13_ppc64, vmx_vr14_ppc64, vmx_vr15_ppc64, + vmx_vr16_ppc64, vmx_vr17_ppc64, vmx_vr18_ppc64, vmx_vr19_ppc64, + vmx_vr20_ppc64, vmx_vr21_ppc64, vmx_vr22_ppc64, vmx_vr23_ppc64, + vmx_vr24_ppc64, vmx_vr25_ppc64, vmx_vr26_ppc64, vmx_vr27_ppc64, + vmx_vr28_ppc64, vmx_vr29_ppc64, vmx_vr30_ppc64, vmx_vr31_ppc64, + vmx_vscr_ppc64, vmx_vrsave_ppc64, + LLDB_INVALID_REGNUM // register sets need to end with this flag +}; + +static const uint32_t g_vsx_regnums_ppc64[] = { + vsx_vs0_ppc64, vsx_vs1_ppc64, vsx_vs2_ppc64, vsx_vs3_ppc64, + vsx_vs4_ppc64, vsx_vs5_ppc64, vsx_vs6_ppc64, vsx_vs7_ppc64, + vsx_vs8_ppc64, vsx_vs9_ppc64, vsx_vs10_ppc64, vsx_vs11_ppc64, + vsx_vs12_ppc64, vsx_vs13_ppc64, vsx_vs14_ppc64, vsx_vs15_ppc64, + vsx_vs16_ppc64, vsx_vs17_ppc64, vsx_vs18_ppc64, vsx_vs19_ppc64, + vsx_vs20_ppc64, vsx_vs21_ppc64, vsx_vs22_ppc64, vsx_vs23_ppc64, + vsx_vs24_ppc64, vsx_vs25_ppc64, vsx_vs26_ppc64, vsx_vs27_ppc64, + vsx_vs28_ppc64, vsx_vs29_ppc64, vsx_vs30_ppc64, vsx_vs31_ppc64, + vsx_vs32_ppc64, vsx_vs33_ppc64, vsx_vs34_ppc64, vsx_vs35_ppc64, + vsx_vs36_ppc64, vsx_vs37_ppc64, vsx_vs38_ppc64, vsx_vs39_ppc64, + vsx_vs40_ppc64, vsx_vs41_ppc64, vsx_vs42_ppc64, vsx_vs43_ppc64, + vsx_vs44_ppc64, vsx_vs45_ppc64, vsx_vs46_ppc64, vsx_vs47_ppc64, + vsx_vs48_ppc64, vsx_vs49_ppc64, vsx_vs50_ppc64, vsx_vs51_ppc64, + vsx_vs52_ppc64, vsx_vs53_ppc64, vsx_vs54_ppc64, vsx_vs55_ppc64, + vsx_vs56_ppc64, vsx_vs57_ppc64, vsx_vs58_ppc64, vsx_vs59_ppc64, + vsx_vs60_ppc64, vsx_vs61_ppc64, vsx_vs62_ppc64, vsx_vs63_ppc64, + LLDB_INVALID_REGNUM // register sets need to end with this flag +}; + +// Number of register sets provided by this context. +static constexpr int k_num_register_sets = 4; + +static const RegisterSet g_reg_sets_ppc64[k_num_register_sets] = { + {"General Purpose Registers", "gpr", k_num_gpr_registers_ppc64, + g_gpr_regnums_ppc64}, + {"Floating Point Registers", "fpr", k_num_fpr_registers_ppc64, + g_fpr_regnums_ppc64}, + {"AltiVec/VMX Registers", "vmx", k_num_vmx_registers_ppc64, + g_vmx_regnums_ppc64}, + {"VSX Registers", "vsx", k_num_vsx_registers_ppc64, g_vsx_regnums_ppc64}, +}; + +NativeRegisterContextAIX_ppc64::NativeRegisterContextAIX_ppc64( + const ArchSpec &target_arch, NativeThreadProtocol &native_thread) + : NativeRegisterContextAIX(native_thread) { + if (target_arch.GetMachine() != llvm::Triple::ppc64) + llvm_unreachable("Unhandled target architecture."); +} + +uint32_t NativeRegisterContextAIX_ppc64::GetRegisterSetCount() const { + return k_num_register_sets; +} + +const RegisterSet * +NativeRegisterContextAIX_ppc64::GetRegisterSet(uint32_t set_index) const { + if (set_index < k_num_register_sets) + return &g_reg_sets_ppc64[set_index]; + + return nullptr; +} + +uint32_t NativeRegisterContextAIX_ppc64::GetUserRegisterCount() const { + uint32_t count = 0; + for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) + count += g_reg_sets_ppc64[set_index].num_registers; + return count; +} + +Status +NativeRegisterContextAIX_ppc64::ReadRegister(const RegisterInfo *reg_info, + RegisterValue ®_value) { + return Status("unimplemented"); +} + +Status +NativeRegisterContextAIX_ppc64::WriteRegister(const RegisterInfo *reg_info, + const RegisterValue ®_value) { + return Status("unimplemented"); +} + +Status NativeRegisterContextAIX_ppc64::ReadAllRegisterValues( + lldb::WritableDataBufferSP &data_sp) { + return Status("unimplemented"); +} + +Status NativeRegisterContextAIX_ppc64::WriteAllRegisterValues( + const lldb::DataBufferSP &data_sp) { + return Status("unimplemented"); +} + +bool NativeRegisterContextAIX_ppc64::IsGPR(unsigned reg) const { + return reg <= k_last_gpr_ppc64; +} + +bool NativeRegisterContextAIX_ppc64::IsFPR(unsigned reg) const { + return (k_first_fpr_ppc64 <= reg && reg <= k_last_fpr_ppc64); +} + +bool NativeRegisterContextAIX_ppc64::IsVMX(unsigned reg) const { + return (reg >= k_first_vmx_ppc64) && (reg <= k_last_vmx_ppc64); +} + +bool NativeRegisterContextAIX_ppc64::IsVSX(unsigned reg) const { + return (reg >= k_first_vsx_ppc64) && (reg <= k_last_vsx_ppc64); +} + +uint32_t NativeRegisterContextAIX_ppc64::CalculateFprOffset( + const RegisterInfo *reg_info) const { + return 0; +} + +uint32_t NativeRegisterContextAIX_ppc64::CalculateVmxOffset( + const RegisterInfo *reg_info) const { + return 0; +} + +uint32_t NativeRegisterContextAIX_ppc64::CalculateVsxOffset( + const RegisterInfo *reg_info) const { + return 0; +} + +#endif // defined(__powerpc64__) diff --git a/lldb/source/Plugins/Process/AIX/NativeRegisterContextAIX_ppc64.h b/lldb/source/Plugins/Process/AIX/NativeRegisterContextAIX_ppc64.h new file mode 100644 index 0000000000000..77f75777737d1 --- /dev/null +++ b/lldb/source/Plugins/Process/AIX/NativeRegisterContextAIX_ppc64.h @@ -0,0 +1,64 @@ +//===------ NativeRegisterContextAIX_ppc64.h --------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#if defined(__powerpc64__) + +#ifndef LLDB_SOURCE_PLUGINS_PROCESS_AIX_NATIVEREGISTERCONTEXTAIX_PPC64_H +#define LLDB_SOURCE_PLUGINS_PROCESS_AIX_NATIVEREGISTERCONTEXTAIX_PPC64_H + +#include "Plugins/Process/AIX/NativeRegisterContextAIX.h" +#include "Plugins/Process/Utility/lldb-ppc64-register-enums.h" + +namespace lldb_private { +namespace process_aix { + +class NativeProcessAIX; + +class NativeRegisterContextAIX_ppc64 : public NativeRegisterContextAIX { +public: + NativeRegisterContextAIX_ppc64(const ArchSpec &target_arch, + NativeThreadProtocol &native_thread); + + uint32_t GetRegisterSetCount() const override; + + uint32_t GetUserRegisterCount() const override; + + const RegisterSet *GetRegisterSet(uint32_t set_index) const override; + + Status ReadRegister(const RegisterInfo *reg_info, + RegisterValue ®_value) override; + + Status WriteRegister(const RegisterInfo *reg_info, + const RegisterValue ®_value) override; + + Status ReadAllRegisterValues(lldb::WritableDataBufferSP &data_sp) override; + + Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; + +private: + bool IsGPR(unsigned reg) const; + + bool IsFPR(unsigned reg) const; + + bool IsVMX(unsigned reg) const; + + bool IsVSX(unsigned reg) const; + + uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const; + + uint32_t CalculateVmxOffset(const RegisterInfo *reg_info) const; + + uint32_t CalculateVsxOffset(const RegisterInfo *reg_info) const; +}; + +} // namespace process_aix +} // namespace lldb_private + +#endif // #ifndef LLDB_SOURCE_PLUGINS_PROCESS_AIX_NATIVEREGISTERCONTEXTAIX_H + +#endif // defined(__powerpc64__) diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfos_ppc64.h b/lldb/source/Plugins/Process/Utility/RegisterInfos_ppc64.h index 8c2e7411dd4e8..5ea561fe22b42 100644 --- a/lldb/source/Plugins/Process/Utility/RegisterInfos_ppc64.h +++ b/lldb/source/Plugins/Process/Utility/RegisterInfos_ppc64.h @@ -16,6 +16,9 @@ (offsetof(FPR_PPC64, regname) + sizeof(GPR_PPC64)) #define VMX_PPC64_OFFSET(regname) \ (offsetof(VMX_PPC64, regname) + sizeof(GPR_PPC64) + sizeof(FPR_PPC64)) +#define VSX_PPC64_OFFSET(regname) \ + (offsetof(VSX_PPC64, regname) + sizeof(GPR_PPC64) + sizeof(FPR_PPC64) + \ + sizeof(VMX_PPC64)) #define GPR_PPC64_SIZE(regname) (sizeof(((GPR_PPC64 *)NULL)->regname)) #include "Utility/PPC64_DWARF_Registers.h" @@ -65,6 +68,21 @@ NULL, \ } +#define DEFINE_VSX_PPC64(reg, lldb_kind) \ + { \ + #reg, \ + NULL, \ + 16, \ + VSX_PPC64_OFFSET(reg), \ + lldb::eEncodingVector, \ + lldb::eFormatVectorOfUInt32, \ + {ppc64_dwarf::dwarf_##reg##_ppc64, ppc64_dwarf::dwarf_##reg##_ppc64, \ + lldb_kind, LLDB_INVALID_REGNUM, vsx_##reg##_ppc64}, \ + NULL, \ + NULL, \ + NULL, \ + } + // General purpose registers. // EH_Frame, Generic, Process Plugin #define PPC64_REGS \ @@ -208,7 +226,71 @@ NULL, \ NULL, \ NULL, \ - }, /* */ + }, \ + DEFINE_VSX_PPC64(vs0, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs1, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs2, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs3, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs4, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs5, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs6, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs7, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs8, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs9, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs10, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs11, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs12, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs13, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs14, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs15, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs16, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs17, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs18, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs19, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs20, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs21, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs22, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs23, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs24, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs25, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs26, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs27, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs28, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs29, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs30, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs31, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs32, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs33, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs34, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs35, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs36, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs37, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs38, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs39, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs40, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs41, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs42, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs43, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs44, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs45, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs46, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs47, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs48, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs49, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs50, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs51, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs52, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs53, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs54, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs55, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs56, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs57, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs58, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs59, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs60, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs61, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs62, LLDB_INVALID_REGNUM), \ + DEFINE_VSX_PPC64(vs63, LLDB_INVALID_REGNUM), /* */ typedef struct _GPR_PPC64 { uint64_t r0; @@ -326,6 +408,73 @@ typedef struct _VMX_PPC64 { uint32_t vrsave; } VMX_PPC64; +typedef struct _VSX_PPC64 { + uint32_t vs0[4]; + uint32_t vs1[4]; + uint32_t vs2[4]; + uint32_t vs3[4]; + uint32_t vs4[4]; + uint32_t vs5[4]; + uint32_t vs6[4]; + uint32_t vs7[4]; + uint32_t vs8[4]; + uint32_t vs9[4]; + uint32_t vs10[4]; + uint32_t vs11[4]; + uint32_t vs12[4]; + uint32_t vs13[4]; + uint32_t vs14[4]; + uint32_t vs15[4]; + uint32_t vs16[4]; + uint32_t vs17[4]; + uint32_t vs18[4]; + uint32_t vs19[4]; + uint32_t vs20[4]; + uint32_t vs21[4]; + uint32_t vs22[4]; + uint32_t vs23[4]; + uint32_t vs24[4]; + uint32_t vs25[4]; + uint32_t vs26[4]; + uint32_t vs27[4]; + uint32_t vs28[4]; + uint32_t vs29[4]; + uint32_t vs30[4]; + uint32_t vs31[4]; + uint32_t vs32[4]; + uint32_t vs33[4]; + uint32_t vs34[4]; + uint32_t vs35[4]; + uint32_t vs36[4]; + uint32_t vs37[4]; + uint32_t vs38[4]; + uint32_t vs39[4]; + uint32_t vs40[4]; + uint32_t vs41[4]; + uint32_t vs42[4]; + uint32_t vs43[4]; + uint32_t vs44[4]; + uint32_t vs45[4]; + uint32_t vs46[4]; + uint32_t vs47[4]; + uint32_t vs48[4]; + uint32_t vs49[4]; + uint32_t vs50[4]; + uint32_t vs51[4]; + uint32_t vs52[4]; + uint32_t vs53[4]; + uint32_t vs54[4]; + uint32_t vs55[4]; + uint32_t vs56[4]; + uint32_t vs57[4]; + uint32_t vs58[4]; + uint32_t vs59[4]; + uint32_t vs60[4]; + uint32_t vs61[4]; + uint32_t vs62[4]; + uint32_t vs63[4]; +} VSX_PPC64; + static lldb_private::RegisterInfo g_register_infos_ppc64[] = {PPC64_REGS}; static_assert((sizeof(g_register_infos_ppc64) / @@ -335,5 +484,6 @@ static_assert((sizeof(g_register_infos_ppc64) / #undef DEFINE_FPR_PPC64 #undef DEFINE_GPR_PPC64 #undef DEFINE_VMX_PPC64 +#undef DEFINE_VSX_PPC64 #endif // DECLARE_REGISTER_INFOS_PPC64_STRUCT diff --git a/lldb/source/Plugins/Process/Utility/lldb-ppc64-register-enums.h b/lldb/source/Plugins/Process/Utility/lldb-ppc64-register-enums.h index 40a75c006d843..19525b2c4ee34 100644 --- a/lldb/source/Plugins/Process/Utility/lldb-ppc64-register-enums.h +++ b/lldb/source/Plugins/Process/Utility/lldb-ppc64-register-enums.h @@ -127,10 +127,78 @@ enum { vmx_vrsave_ppc64, k_last_vmx_ppc64 = vmx_vrsave_ppc64, + k_first_vsx_ppc64, + vsx_vs0_ppc64 = k_first_vsx_ppc64, + vsx_vs1_ppc64, + vsx_vs2_ppc64, + vsx_vs3_ppc64, + vsx_vs4_ppc64, + vsx_vs5_ppc64, + vsx_vs6_ppc64, + vsx_vs7_ppc64, + vsx_vs8_ppc64, + vsx_vs9_ppc64, + vsx_vs10_ppc64, + vsx_vs11_ppc64, + vsx_vs12_ppc64, + vsx_vs13_ppc64, + vsx_vs14_ppc64, + vsx_vs15_ppc64, + vsx_vs16_ppc64, + vsx_vs17_ppc64, + vsx_vs18_ppc64, + vsx_vs19_ppc64, + vsx_vs20_ppc64, + vsx_vs21_ppc64, + vsx_vs22_ppc64, + vsx_vs23_ppc64, + vsx_vs24_ppc64, + vsx_vs25_ppc64, + vsx_vs26_ppc64, + vsx_vs27_ppc64, + vsx_vs28_ppc64, + vsx_vs29_ppc64, + vsx_vs30_ppc64, + vsx_vs31_ppc64, + vsx_vs32_ppc64, + vsx_vs33_ppc64, + vsx_vs34_ppc64, + vsx_vs35_ppc64, + vsx_vs36_ppc64, + vsx_vs37_ppc64, + vsx_vs38_ppc64, + vsx_vs39_ppc64, + vsx_vs40_ppc64, + vsx_vs41_ppc64, + vsx_vs42_ppc64, + vsx_vs43_ppc64, + vsx_vs44_ppc64, + vsx_vs45_ppc64, + vsx_vs46_ppc64, + vsx_vs47_ppc64, + vsx_vs48_ppc64, + vsx_vs49_ppc64, + vsx_vs50_ppc64, + vsx_vs51_ppc64, + vsx_vs52_ppc64, + vsx_vs53_ppc64, + vsx_vs54_ppc64, + vsx_vs55_ppc64, + vsx_vs56_ppc64, + vsx_vs57_ppc64, + vsx_vs58_ppc64, + vsx_vs59_ppc64, + vsx_vs60_ppc64, + vsx_vs61_ppc64, + vsx_vs62_ppc64, + vsx_vs63_ppc64, + k_last_vsx_ppc64 = vsx_vs63_ppc64, + k_num_registers_ppc64, k_num_gpr_registers_ppc64 = k_last_gpr_ppc64 - k_first_gpr_ppc64 + 1, k_num_fpr_registers_ppc64 = k_last_fpr_ppc64 - k_first_fpr_ppc64 + 1, k_num_vmx_registers_ppc64 = k_last_vmx_ppc64 - k_first_vmx_ppc64 + 1, + k_num_vsx_registers_ppc64 = k_last_vsx_ppc64 - k_first_vsx_ppc64 + 1, }; #endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_PPC64_REGISTER_ENUMS_H diff --git a/lldb/source/Utility/PPC64_DWARF_Registers.h b/lldb/source/Utility/PPC64_DWARF_Registers.h index 4f279be01b277..a5fefc2d07ccd 100644 --- a/lldb/source/Utility/PPC64_DWARF_Registers.h +++ b/lldb/source/Utility/PPC64_DWARF_Registers.h @@ -119,6 +119,70 @@ enum { dwarf_vr29_ppc64, dwarf_vr30_ppc64, dwarf_vr31_ppc64, + dwarf_vs0_ppc64, + dwarf_vs1_ppc64, + dwarf_vs2_ppc64, + dwarf_vs3_ppc64, + dwarf_vs4_ppc64, + dwarf_vs5_ppc64, + dwarf_vs6_ppc64, + dwarf_vs7_ppc64, + dwarf_vs8_ppc64, + dwarf_vs9_ppc64, + dwarf_vs10_ppc64, + dwarf_vs11_ppc64, + dwarf_vs12_ppc64, + dwarf_vs13_ppc64, + dwarf_vs14_ppc64, + dwarf_vs15_ppc64, + dwarf_vs16_ppc64, + dwarf_vs17_ppc64, + dwarf_vs18_ppc64, + dwarf_vs19_ppc64, + dwarf_vs20_ppc64, + dwarf_vs21_ppc64, + dwarf_vs22_ppc64, + dwarf_vs23_ppc64, + dwarf_vs24_ppc64, + dwarf_vs25_ppc64, + dwarf_vs26_ppc64, + dwarf_vs27_ppc64, + dwarf_vs28_ppc64, + dwarf_vs29_ppc64, + dwarf_vs30_ppc64, + dwarf_vs31_ppc64, + dwarf_vs32_ppc64, + dwarf_vs33_ppc64, + dwarf_vs34_ppc64, + dwarf_vs35_ppc64, + dwarf_vs36_ppc64, + dwarf_vs37_ppc64, + dwarf_vs38_ppc64, + dwarf_vs39_ppc64, + dwarf_vs40_ppc64, + dwarf_vs41_ppc64, + dwarf_vs42_ppc64, + dwarf_vs43_ppc64, + dwarf_vs44_ppc64, + dwarf_vs45_ppc64, + dwarf_vs46_ppc64, + dwarf_vs47_ppc64, + dwarf_vs48_ppc64, + dwarf_vs49_ppc64, + dwarf_vs50_ppc64, + dwarf_vs51_ppc64, + dwarf_vs52_ppc64, + dwarf_vs53_ppc64, + dwarf_vs54_ppc64, + dwarf_vs55_ppc64, + dwarf_vs56_ppc64, + dwarf_vs57_ppc64, + dwarf_vs58_ppc64, + dwarf_vs59_ppc64, + dwarf_vs60_ppc64, + dwarf_vs61_ppc64, + dwarf_vs62_ppc64, + dwarf_vs63_ppc64, }; } // namespace ppc64_dwarf _______________________________________________ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
