https://github.com/MkDev11 updated https://github.com/llvm/llvm-project/pull/175262
>From c851762bb1c69566dcee36d517d0baac169cee47 Mon Sep 17 00:00:00 2001 From: mkdev11 <[email protected]> Date: Mon, 12 Jan 2026 15:46:56 +0200 Subject: [PATCH] [lldb][RISCV] Fix GetRegisterInfo to support RISCV-32 GetRegisterInfo in EmulateInstructionRISCV.cpp was hardcoded to use RegisterInfoPOSIX_riscv64, which caused LLDB to assert when working with RISCV-32 ELF files. This patch adds a check for the architecture and uses RegisterInfoPOSIX_riscv32 when the target is RISCV-32. Fixes #175092 --- .../RISCV/EmulateInstructionRISCV.cpp | 26 ++++++++++++++----- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp index 2957cb716041d..f0e21b8585bb2 100644 --- a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp +++ b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp @@ -7,6 +7,7 @@ //===----------------------------------------------------------------------===// #include "EmulateInstructionRISCV.h" +#include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv32.h" #include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h" #include "Plugins/Process/Utility/lldb-riscv-register-enums.h" #include "RISCVCInstructions.h" @@ -1837,15 +1838,26 @@ EmulateInstructionRISCV::GetRegisterInfo(RegisterKind reg_kind, } } - RegisterInfoPOSIX_riscv64 reg_info(m_arch, - RegisterInfoPOSIX_riscv64::eRegsetMaskAll); - const RegisterInfo *array = reg_info.GetRegisterInfo(); - const uint32_t length = reg_info.GetRegisterCount(); + auto get_register_info_helper = + [reg_index, + reg_kind](const auto ®_info) -> std::optional<RegisterInfo> { + const RegisterInfo *array = reg_info.GetRegisterInfo(); + const uint32_t length = reg_info.GetRegisterCount(); - if (reg_index >= length || reg_kind != eRegisterKindLLDB) - return {}; + if (reg_index >= length || reg_kind != eRegisterKindLLDB) + return {}; + + return array[reg_index]; + }; - return array[reg_index]; + switch (m_arch.GetCore()) { + case ArchSpec::eCore_riscv32: + return get_register_info_helper(RegisterInfoPOSIX_riscv32( + m_arch, RegisterInfoPOSIX_riscv32::eRegsetMaskAll)); + default: + return get_register_info_helper(RegisterInfoPOSIX_riscv64( + m_arch, RegisterInfoPOSIX_riscv64::eRegsetMaskAll)); + } } bool EmulateInstructionRISCV::SetInstruction(const Opcode &opcode, _______________________________________________ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
