omjavaid wrote: Thanks @ayushsahay1837 for working on this.
Some high level comments below: **1)** Description and commit message may require a rewrite. I had to read till the last paragraph to figure out that VL is fixed for process lifetime. Also streaming mode is an SME thing, mixing it in here makes it confusing whether dynamic switching between SVE and SME and dynamic register size change is supported or not. **2)** ConfigureRegisterContext runs on every stop via DoStop -> InvalidateAllRegisters and does a full GetThreadContext with XSTATE for every thread. Can we do something about it? Also the comment says "in case there is any change in the configuration" which contradicts the description, VL cant change. **3)** vg should go in the expedited register set like we do on Linux otherwise client reads it on every stop. **4)** We need a way to test this without hardware, something like https://lldb.llvm.org/resources/qemu-testing.html but for windows. **5)** Current test only runs at VL=128 where Z access just falls back to FPR read/write so the new interleaving code never actually runs. Can you do a run on a QEMU windows arm64 guest with SVE VL > 128 and share results? Best if you give add test instructions using QEMU and may be if I find time can try it own my own. **6)** Also test should get register sizes from vg instead of hardcoding 16 bytes. **7)** Too many #if PF_ARM_SVE_INSTRUCTIONS_AVAILABLE, even inside function signatures and if bodies, hard to follow the control flow. We had the same problem on Linux and solved it with LinuxPTraceDefines_arm64sve.h. https://github.com/llvm/llvm-project/pull/205906 _______________________________________________ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
