Mirko =?utf-8?q?Brkušanin?= <mirko.brkusa...@amd.com>, Mirko =?utf-8?q?Brkušanin?= <mirko.brkusa...@amd.com> Message-ID: In-Reply-To: <llvm.org/llvm/llvm-project/pull/78...@github.com>
================ @@ -305,6 +305,11 @@ class VOP3OpSel_gfx10<bits<10> op, VOPProfile p> : VOP3e_gfx10<op, p> { class VOP3OpSel_gfx11_gfx12<bits<10> op, VOPProfile p> : VOP3OpSel_gfx10<op, p>; +class VOP3FP8OpSel_gfx11_gfx12<bits<10> op, VOPProfile p> : VOP3e_gfx10<op, p> { + let Inst{11} = !if(p.HasSrc0, src0_modifiers{2}, 0); + let Inst{12} = !if(p.HasSrc0, src0_modifiers{3}, 0); ---------------- Sisyph wrote: Thanks! I do think that patch will help a lot. I also think it handles the case where we use dst_op_sel to store the other bit instead of src1. If the CVT_F32_FP8 instruction was VOP3P, we would need a special case, but since it is VOP3, we want all the op_sel bits to be zero and we want dst_op_sel to be zero. https://github.com/llvm/llvm-project/pull/78414 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits