Author: Muhammad Omair Javaid Date: 2024-05-13T16:05:02+05:00 New Revision: 4b44502ac81259630b422e791a82e0252e6478c3
URL: https://github.com/llvm/llvm-project/commit/4b44502ac81259630b422e791a82e0252e6478c3 DIFF: https://github.com/llvm/llvm-project/commit/4b44502ac81259630b422e791a82e0252e6478c3.diff LOG: Revert "[lldb/aarch64] Fix unwinding when signal interrupts a leaf function (#91321)" This reverts commit fd1bd53ba5a06f344698a55578f6a5d79c457e30. TestInterruptBacktrace was broken on AArch64/Windows as a result of this change. See lldb-aarch64-windows buildbot here: https://lab.llvm.org/buildbot/#/builders/219/builds/11261 Added: Modified: lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp lldb/source/Target/RegisterContextUnwind.cpp lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp Removed: lldb/test/Shell/Unwind/Inputs/signal-in-leaf-function-aarch64.c lldb/test/Shell/Unwind/signal-in-leaf-function-aarch64.test ################################################################################ diff --git a/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp b/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp index 62ecac3e0831d..6ca4fb052457e 100644 --- a/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp +++ b/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp @@ -444,8 +444,6 @@ bool EmulateInstructionARM64::CreateFunctionEntryUnwind( // Our previous Call Frame Address is the stack pointer row->GetCFAValue().SetIsRegisterPlusOffset(gpr_sp_arm64, 0); - row->SetRegisterLocationToSame(gpr_lr_arm64, /*must_replace=*/false); - row->SetRegisterLocationToSame(gpr_fp_arm64, /*must_replace=*/false); unwind_plan.AppendRow(row); unwind_plan.SetSourceName("EmulateInstructionARM64"); diff --git a/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp b/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp index 49edd40544e32..c4a171ec7d01b 100644 --- a/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp +++ b/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp @@ -424,6 +424,8 @@ size_t UnwindAssemblyInstEmulation::WriteMemory( log->PutString(strm.GetString()); } + const bool cant_replace = false; + switch (context.type) { default: case EmulateInstruction::eContextInvalid: @@ -465,7 +467,7 @@ size_t UnwindAssemblyInstEmulation::WriteMemory( m_pushed_regs[reg_num] = addr; const int32_t offset = addr - m_initial_sp; m_curr_row->SetRegisterLocationToAtCFAPlusOffset(reg_num, offset, - /*can_replace=*/true); + cant_replace); m_curr_row_modified = true; } } diff --git a/lldb/source/Target/RegisterContextUnwind.cpp b/lldb/source/Target/RegisterContextUnwind.cpp index e2d712cb72eae..13e101413a477 100644 --- a/lldb/source/Target/RegisterContextUnwind.cpp +++ b/lldb/source/Target/RegisterContextUnwind.cpp @@ -1555,12 +1555,12 @@ RegisterContextUnwind::SavedLocationForRegister( } if (unwindplan_regloc.IsSame()) { - if (!m_all_registers_available && + if (!IsFrameZero() && (regnum.GetAsKind(eRegisterKindGeneric) == LLDB_REGNUM_GENERIC_PC || regnum.GetAsKind(eRegisterKindGeneric) == LLDB_REGNUM_GENERIC_RA)) { UnwindLogMsg("register %s (%d) is marked as 'IsSame' - it is a pc or " - "return address reg on a frame which does not have all " - "registers available -- treat as if we have no information", + "return address reg on a non-zero frame -- treat as if we " + "have no information", regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB)); return UnwindLLDB::RegisterSearchResult::eRegisterNotFound; } else { diff --git a/lldb/test/Shell/Unwind/Inputs/signal-in-leaf-function-aarch64.c b/lldb/test/Shell/Unwind/Inputs/signal-in-leaf-function-aarch64.c deleted file mode 100644 index 9a751330623f4..0000000000000 --- a/lldb/test/Shell/Unwind/Inputs/signal-in-leaf-function-aarch64.c +++ /dev/null @@ -1,15 +0,0 @@ -#include <signal.h> -#include <unistd.h> - -int __attribute__((naked)) signal_generating_add(int a, int b) { - asm("add w0, w1, w0\n\t" - "udf #0xdead\n\t" - "ret"); -} - -void sigill_handler(int) { _exit(0); } - -int main() { - signal(SIGILL, sigill_handler); - return signal_generating_add(42, 47); -} diff --git a/lldb/test/Shell/Unwind/signal-in-leaf-function-aarch64.test b/lldb/test/Shell/Unwind/signal-in-leaf-function-aarch64.test deleted file mode 100644 index 0580d0cf734ae..0000000000000 --- a/lldb/test/Shell/Unwind/signal-in-leaf-function-aarch64.test +++ /dev/null @@ -1,24 +0,0 @@ -# REQUIRES: target-aarch64 && native -# UNSUPPORTED: system-windows - -# RUN: %clang_host %S/Inputs/signal-in-leaf-function-aarch64.c -o %t -# RUN: %lldb -s %s -o exit %t | FileCheck %s - -breakpoint set -n sigill_handler -# CHECK: Breakpoint 1: where = {{.*}}`sigill_handler - -run -# CHECK: thread #1, {{.*}} stop reason = signal SIGILL - -thread backtrace -# CHECK: frame #0: [[ADD:0x[0-9a-fA-F]*]] {{.*}}`signal_generating_add -# CHECK: frame #1: [[MAIN:0x[0-9a-fA-F]*]] {{.*}}`main - -continue -# CHECK: thread #1, {{.*}} stop reason = breakpoint 1 - -thread backtrace -# CHECK: frame #0: {{.*}}`sigill_handler -# Unknown number of signal trampoline frames -# CHECK: frame #{{[0-9]+}}: [[ADD]] {{.*}}`signal_generating_add -# CHECK: frame #{{[0-9]+}}: [[MAIN]] {{.*}}`main diff --git a/lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp b/lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp index 9303d6f5f3c6e..80abeb8fae9e5 100644 --- a/lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp +++ b/lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp @@ -77,7 +77,7 @@ TEST_F(TestArm64InstEmulation, TestSimpleDarwinFunction) { // UnwindPlan we expect: - // row[0]: 0: CFA=sp +0 => fp= <same> lr= <same> + // row[0]: 0: CFA=sp +0 => // row[1]: 4: CFA=sp+16 => fp=[CFA-16] lr=[CFA-8] // row[2]: 8: CFA=fp+16 => fp=[CFA-16] lr=[CFA-8] // row[2]: 16: CFA=sp+16 => fp=[CFA-16] lr=[CFA-8] @@ -88,19 +88,13 @@ TEST_F(TestArm64InstEmulation, TestSimpleDarwinFunction) { EXPECT_TRUE(engine->GetNonCallSiteUnwindPlanFromAssembly( sample_range, data, sizeof(data), unwind_plan)); - // CFA=sp +0 => fp= <same> lr= <same> + // CFA=sp +0 row_sp = unwind_plan.GetRowForFunctionOffset(0); EXPECT_EQ(0ull, row_sp->GetOffset()); EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == gpr_sp_arm64); EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true); EXPECT_EQ(0, row_sp->GetCFAValue().GetOffset()); - EXPECT_TRUE(row_sp->GetRegisterInfo(gpr_fp_arm64, regloc)); - EXPECT_TRUE(regloc.IsSame()); - - EXPECT_TRUE(row_sp->GetRegisterInfo(gpr_lr_arm64, regloc)); - EXPECT_TRUE(regloc.IsSame()); - // CFA=sp+16 => fp=[CFA-16] lr=[CFA-8] row_sp = unwind_plan.GetRowForFunctionOffset(4); EXPECT_EQ(4ull, row_sp->GetOffset()); @@ -152,12 +146,6 @@ TEST_F(TestArm64InstEmulation, TestSimpleDarwinFunction) { EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == gpr_sp_arm64); EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true); EXPECT_EQ(0, row_sp->GetCFAValue().GetOffset()); - - EXPECT_TRUE(row_sp->GetRegisterInfo(gpr_fp_arm64, regloc)); - EXPECT_TRUE(regloc.IsSame()); - - EXPECT_TRUE(row_sp->GetRegisterInfo(gpr_lr_arm64, regloc)); - EXPECT_TRUE(regloc.IsSame()); } TEST_F(TestArm64InstEmulation, TestMediumDarwinFunction) { @@ -393,12 +381,8 @@ TEST_F(TestArm64InstEmulation, TestFramelessThreeEpilogueFunction) { EXPECT_FALSE(row_sp->GetRegisterInfo(gpr_x26_arm64, regloc)); EXPECT_FALSE(row_sp->GetRegisterInfo(gpr_x27_arm64, regloc)); EXPECT_FALSE(row_sp->GetRegisterInfo(gpr_x28_arm64, regloc)); - - EXPECT_TRUE(row_sp->GetRegisterInfo(gpr_fp_arm64, regloc)); - EXPECT_TRUE(regloc.IsSame()); - - EXPECT_TRUE(row_sp->GetRegisterInfo(gpr_lr_arm64, regloc)); - EXPECT_TRUE(regloc.IsSame()); + EXPECT_FALSE(row_sp->GetRegisterInfo(gpr_fp_arm64, regloc)); + EXPECT_FALSE(row_sp->GetRegisterInfo(gpr_lr_arm64, regloc)); row_sp = unwind_plan.GetRowForFunctionOffset(36); EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == gpr_sp_arm64); _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
