jasonmolenda wrote: A quick look at the RISCV ISA and it says that the JAL instruction is pc relative and can jump +/- 1MB. JALR is also pc-relative but it gets the upper 20 bits from a general purpose register and it includes 12 low bits in its instruction encoding. I know almost nothing about rv32, but is this what you mean by a Large Memory Model, the use of the JALR instruction? I didn't find the part that talks about how JALR works in rv64, but it seems likely it can specify an arbitrary 64-bit address?
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