Author: tstellar
Date: Tue Apr 8 19:20:55 2014
New Revision: 205823
URL: http://llvm.org/viewvc/llvm-project?rev=205823&view=rev
Log:
Merging r203054:
------------------------------------------------------------------------
r203054 | hfinkel | 2014-03-05 20:28:23 -0500 (Wed, 05 Mar 2014) | 7 lines
The PPC global base register cannot be r0
The global base register cannot be r0 because it might end up as the first
argument to addi or addis. Fixes PR18316.
I don't have a small stable test case.
------------------------------------------------------------------------
Modified:
llvm/branches/release_34/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Modified: llvm/branches/release_34/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=205823&r1=205822&r2=205823&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/branches/release_34/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Tue Apr 8
19:20:55 2014
@@ -261,11 +261,11 @@ SDNode *PPCDAGToDAGISel::getGlobalBaseRe
DebugLoc dl;
if (PPCLowering.getPointerTy() == MVT::i32) {
- GlobalBaseReg = RegInfo->createVirtualRegister(&PPC::GPRCRegClass);
+ GlobalBaseReg = RegInfo->createVirtualRegister(&PPC::GPRC_NOR0RegClass);
BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR));
BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR), GlobalBaseReg);
} else {
- GlobalBaseReg = RegInfo->createVirtualRegister(&PPC::G8RCRegClass);
+ GlobalBaseReg = RegInfo->createVirtualRegister(&PPC::G8RC_NOX0RegClass);
BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR8));
BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR8), GlobalBaseReg);
}
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