Author: dsanders Date: Mon Dec 1 04:07:55 2014 New Revision: 222998 URL: http://llvm.org/viewvc/llvm-project?rev=222998&view=rev Log: Merging r217160:
[mips] Mark aggregates returned in registers with the 'inreg' attribute. Summary: This allows us to easily find them in the backend after the aggregates have been lowered to other types. This is important on big-endian targets using the N32/N64 ABI's since these ABI's must shift small structures into the upper bits of the register. Reviewers: atanasyan Reviewed By: atanasyan Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5005 Modified: cfe/branches/release_35/lib/CodeGen/TargetInfo.cpp cfe/branches/release_35/test/CodeGen/mips-vector-return.c cfe/branches/release_35/test/CodeGen/mips64-class-return.cpp Modified: cfe/branches/release_35/lib/CodeGen/TargetInfo.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/branches/release_35/lib/CodeGen/TargetInfo.cpp?rev=222998&r1=222997&r2=222998&view=diff ============================================================================== --- cfe/branches/release_35/lib/CodeGen/TargetInfo.cpp (original) +++ cfe/branches/release_35/lib/CodeGen/TargetInfo.cpp Mon Dec 1 04:07:55 2014 @@ -5519,12 +5519,15 @@ ABIArgInfo MipsABIInfo::classifyReturnTy if (RetTy->isAnyComplexType()) return ABIArgInfo::getDirect(); - // O32 returns integer vectors in registers. - if (IsO32 && RetTy->isVectorType() && !RetTy->hasFloatingRepresentation()) - return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); - - if (!IsO32) - return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); + // O32 returns integer vectors in registers and N32/N64 returns all small + // aggregates in registers.. + if (!IsO32 || + (RetTy->isVectorType() && !RetTy->hasFloatingRepresentation())) { + ABIArgInfo ArgInfo = + ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); + ArgInfo.setInReg(true); + return ArgInfo; + } } return ABIArgInfo::getIndirect(0); Modified: cfe/branches/release_35/test/CodeGen/mips-vector-return.c URL: http://llvm.org/viewvc/llvm-project/cfe/branches/release_35/test/CodeGen/mips-vector-return.c?rev=222998&r1=222997&r2=222998&view=diff ============================================================================== --- cfe/branches/release_35/test/CodeGen/mips-vector-return.c (original) +++ cfe/branches/release_35/test/CodeGen/mips-vector-return.c Mon Dec 1 04:07:55 2014 @@ -9,7 +9,7 @@ typedef double v4df __attribute__ ((__ve typedef int v4i32 __attribute__ ((__vector_size__ (16))); // O32-LABEL: define void @test_v4sf(<4 x float>* noalias nocapture sret -// N64: define { i64, i64 } @test_v4sf +// N64: define inreg { i64, i64 } @test_v4sf v4sf test_v4sf(float a) { return (v4sf){0.0f, a, 0.0f, 0.0f}; } @@ -23,8 +23,8 @@ v4df test_v4df(double a) { // O32 returns integer vectors whose size is equal to or smaller than 16-bytes // in integer registers. // -// O32: define { i32, i32, i32, i32 } @test_v4i32 -// N64: define { i64, i64 } @test_v4i32 +// O32: define inreg { i32, i32, i32, i32 } @test_v4i32 +// N64: define inreg { i64, i64 } @test_v4i32 v4i32 test_v4i32(int a) { return (v4i32){0, a, 0, 0}; } Modified: cfe/branches/release_35/test/CodeGen/mips64-class-return.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/branches/release_35/test/CodeGen/mips64-class-return.cpp?rev=222998&r1=222997&r2=222998&view=diff ============================================================================== --- cfe/branches/release_35/test/CodeGen/mips64-class-return.cpp (original) +++ cfe/branches/release_35/test/CodeGen/mips64-class-return.cpp Mon Dec 1 04:07:55 2014 @@ -24,17 +24,17 @@ extern D0 gd0; extern D1 gd1; extern D2 gd2; -// CHECK: define { i64, i64 } @_Z4foo1v() +// CHECK: define inreg { i64, i64 } @_Z4foo1v() D0 foo1(void) { return gd0; } -// CHECK: define { double, float } @_Z4foo2v() +// CHECK: define inreg { double, float } @_Z4foo2v() D1 foo2(void) { return gd1; } -// CHECK-LABEL: define void @_Z4foo32D2(i64 %a0.coerce0, double %a0.coerce1) +// CHECK-LABEL: define void @_Z4foo32D2(i64 %a0.coerce0, double %a0.coerce1) void foo3(D2 a0) { gd2 = a0; } _______________________________________________ llvm-branch-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/llvm-branch-commits
