Author: dsanders Date: Mon Dec 1 11:14:37 2014 New Revision: 223053 URL: http://llvm.org/viewvc/llvm-project?rev=223053&view=rev Log: Merged from r221521:
[mips] Remove remaining use of MipsCC::intArgRegs() in favour of MipsABIInfo::GetByValArgRegs() and MipsABIInfo::GetVarArgRegs() Summary: Reviewers: theraven, vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6113 Modified: llvm/branches/release_35/lib/Target/Mips/MipsABIInfo.cpp llvm/branches/release_35/lib/Target/Mips/MipsABIInfo.h llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h Modified: llvm/branches/release_35/lib/Target/Mips/MipsABIInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/Mips/MipsABIInfo.cpp?rev=223053&r1=223052&r2=223053&view=diff ============================================================================== --- llvm/branches/release_35/lib/Target/Mips/MipsABIInfo.cpp (original) +++ llvm/branches/release_35/lib/Target/Mips/MipsABIInfo.cpp Mon Dec 1 11:14:37 2014 @@ -27,3 +27,11 @@ const ArrayRef<MCPhysReg> MipsABIInfo::G return makeArrayRef(Mips64IntRegs); llvm_unreachable("Unhandled ABI"); } + +const ArrayRef<MCPhysReg> MipsABIInfo::GetVarArgRegs() const { + if (IsO32()) + return makeArrayRef(O32IntRegs); + if (IsN32() || IsN64()) + return makeArrayRef(Mips64IntRegs); + llvm_unreachable("Unhandled ABI"); +} Modified: llvm/branches/release_35/lib/Target/Mips/MipsABIInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/Mips/MipsABIInfo.h?rev=223053&r1=223052&r2=223053&view=diff ============================================================================== --- llvm/branches/release_35/lib/Target/Mips/MipsABIInfo.h (original) +++ llvm/branches/release_35/lib/Target/Mips/MipsABIInfo.h Mon Dec 1 11:14:37 2014 @@ -38,8 +38,12 @@ public: bool IsEABI() const { return ThisABI == ABI::EABI; } ABI GetEnumValue() const { return ThisABI; } + /// The registers to use for byval arguments. const ArrayRef<MCPhysReg> GetByValArgRegs() const; + /// The registers to use for the variable argument list. + const ArrayRef<MCPhysReg> GetVarArgRegs() const; + /// Ordering of ABI's /// MipsGenSubtargetInfo.inc will use this to resolve conflicts when given /// multiple ABI options. Modified: llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp?rev=223053&r1=223052&r2=223053&view=diff ============================================================================== --- llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp Mon Dec 1 11:14:37 2014 @@ -3619,12 +3619,6 @@ unsigned MipsTargetLowering::MipsCC::res return (Subtarget.isABI_O32() && (CallConv != CallingConv::Fast)) ? 16 : 0; } -const ArrayRef<MCPhysReg> MipsTargetLowering::MipsCC::intArgRegs() const { - if (Subtarget.isABI_O32()) - return makeArrayRef(O32IntRegs); - return makeArrayRef(Mips64IntRegs); -} - void MipsTargetLowering::copyByValRegs( SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals, @@ -3637,11 +3631,11 @@ void MipsTargetLowering::copyByValRegs( unsigned RegAreaSize = NumRegs * GPRSizeInBytes; unsigned FrameObjSize = std::max(Flags.getByValSize(), RegAreaSize); int FrameObjOffset; + ArrayRef<MCPhysReg> ByValArgRegs = Subtarget.getABI().GetByValArgRegs(); if (RegAreaSize) - FrameObjOffset = - (int)CC.reservedArgArea() - - (int)((CC.intArgRegs().size() - FirstReg) * GPRSizeInBytes); + FrameObjOffset = (int)CC.reservedArgArea() - + (int)((ByValArgRegs.size() - FirstReg) * GPRSizeInBytes); else FrameObjOffset = VA.getLocMemOffset(); @@ -3659,7 +3653,7 @@ void MipsTargetLowering::copyByValRegs( const TargetRegisterClass *RC = getRegClassFor(RegTy); for (unsigned I = 0; I < NumRegs; ++I) { - unsigned ArgReg = CC.intArgRegs()[FirstReg + I]; + unsigned ArgReg = ByValArgRegs[FirstReg + I]; unsigned VReg = addLiveIn(MF, ArgReg, RC); unsigned Offset = I * GPRSizeInBytes; SDValue StorePtr = DAG.getNode(ISD::ADD, DL, PtrTy, FIN, @@ -3687,7 +3681,7 @@ void MipsTargetLowering::passByValArg( unsigned NumRegs = LastReg - FirstReg; if (NumRegs) { - const ArrayRef<MCPhysReg> ArgRegs = CC.intArgRegs(); + const ArrayRef<MCPhysReg> ArgRegs = Subtarget.getABI().GetByValArgRegs(); bool LeftoverBytes = (NumRegs * RegSizeInBytes > ByValSizeInBytes); unsigned I = 0; @@ -3769,7 +3763,7 @@ void MipsTargetLowering::writeVarArgRegs const MipsCC &CC, SDValue Chain, SDLoc DL, SelectionDAG &DAG, CCState &State) const { - const ArrayRef<MCPhysReg> ArgRegs = CC.intArgRegs(); + const ArrayRef<MCPhysReg> ArgRegs = Subtarget.getABI().GetVarArgRegs(); unsigned Idx = State.getFirstUnallocated(ArgRegs.data(), ArgRegs.size()); unsigned RegSizeInBytes = Subtarget.getGPRSizeInBytes(); MVT RegTy = MVT::getIntegerVT(RegSizeInBytes * 8); Modified: llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h?rev=223053&r1=223052&r2=223053&view=diff ============================================================================== --- llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h (original) +++ llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h Mon Dec 1 11:14:37 2014 @@ -351,9 +351,6 @@ namespace llvm { /// register arguments. This is 16-byte if ABI is O32. unsigned reservedArgArea() const; - /// Return pointer to array of integer argument registers. - const ArrayRef<MCPhysReg> intArgRegs() const; - private: CallingConv::ID CallConv; const MipsSubtarget &Subtarget; _______________________________________________ llvm-branch-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/llvm-branch-commits
