Author: hans Date: Tue Feb 17 15:53:25 2015 New Revision: 229555 URL: http://llvm.org/viewvc/llvm-project?rev=229555&view=rev Log: Merging r226791: ------------------------------------------------------------------------ r226791 | delena | 2015-01-22 00:20:06 -0800 (Thu, 22 Jan 2015) | 7 lines
Fixed a bug in masked load/store in reversed loop. Added a test. The bug was submitted to bugzilla: http://llvm.org/bugs/show_bug.cgi?id=22225 ------------------------------------------------------------------------ Modified: llvm/branches/release_36/ (props changed) llvm/branches/release_36/lib/Transforms/Vectorize/LoopVectorize.cpp llvm/branches/release_36/test/Transforms/LoopVectorize/X86/masked_load_store.ll Propchange: llvm/branches/release_36/ ------------------------------------------------------------------------------ --- svn:mergeinfo (original) +++ svn:mergeinfo Tue Feb 17 15:53:25 2015 @@ -1,3 +1,3 @@ /llvm/branches/Apple/Pertwee:110850,110961 /llvm/branches/type-system-rewrite:133420-134817 -/llvm/trunk:155241,226023,226029,226044,226046,226048,226058,226075,226170-226171,226182,226473,226588,226616,226664,226708,226711,226755,226809,227005,227085,227250,227260-227261,227290,227294,227299,227319,227339,227491,227584,227603,227628,227670,227809,227815,227903,227934,227972,227983,228049,228129,228168,228331,228411,228444,228490,228500,228507,228518,228525,228565,228656,228760-228761,228793,228842,228899,228957,228969,228979,229029,229343,229351,229421 +/llvm/trunk:155241,226023,226029,226044,226046,226048,226058,226075,226170-226171,226182,226473,226588,226616,226664,226708,226711,226755,226791,226809,227005,227085,227250,227260-227261,227290,227294,227299,227319,227339,227491,227584,227603,227628,227670,227809,227815,227903,227934,227972,227983,228049,228129,228168,228331,228411,228444,228490,228500,228507,228518,228525,228565,228656,228760-228761,228793,228842,228899,228957,228969,228979,229029,229343,229351,229421 Modified: llvm/branches/release_36/lib/Transforms/Vectorize/LoopVectorize.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/lib/Transforms/Vectorize/LoopVectorize.cpp?rev=229555&r1=229554&r2=229555&view=diff ============================================================================== --- llvm/branches/release_36/lib/Transforms/Vectorize/LoopVectorize.cpp (original) +++ llvm/branches/release_36/lib/Transforms/Vectorize/LoopVectorize.cpp Tue Feb 17 15:53:25 2015 @@ -1874,6 +1874,7 @@ void InnerLoopVectorizer::vectorizeMemor // wide store needs to start at the last vector element. PartPtr = Builder.CreateGEP(Ptr, Builder.getInt32(-Part * VF)); PartPtr = Builder.CreateGEP(PartPtr, Builder.getInt32(1 - VF)); + Mask[Part] = reverseVector(Mask[Part]); } Value *VecPtr = Builder.CreateBitCast(PartPtr, @@ -1902,6 +1903,7 @@ void InnerLoopVectorizer::vectorizeMemor // wide load needs to start at the last vector element. PartPtr = Builder.CreateGEP(Ptr, Builder.getInt32(-Part * VF)); PartPtr = Builder.CreateGEP(PartPtr, Builder.getInt32(1 - VF)); + Mask[Part] = reverseVector(Mask[Part]); } Instruction* NewLI; Modified: llvm/branches/release_36/test/Transforms/LoopVectorize/X86/masked_load_store.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/Transforms/LoopVectorize/X86/masked_load_store.ll?rev=229555&r1=229554&r2=229555&view=diff ============================================================================== --- llvm/branches/release_36/test/Transforms/LoopVectorize/X86/masked_load_store.ll (original) +++ llvm/branches/release_36/test/Transforms/LoopVectorize/X86/masked_load_store.ll Tue Feb 17 15:53:25 2015 @@ -418,3 +418,85 @@ for.end: ret void } +; Reverse loop +;void foo6(double *in, double *out, unsigned size, int *trigger) { +; +; for (int i=SIZE-1; i>=0; i--) { +; if (trigger[i] > 0) { +; out[i] = in[i] + (double) 0.5; +; } +; } +;} +;AVX2-LABEL: @foo6 +;AVX2: icmp sgt <4 x i32> %reverse, zeroinitializer +;AVX2: shufflevector <4 x i1>{{.*}}<4 x i32> <i32 3, i32 2, i32 1, i32 0> +;AVX2: call <4 x double> @llvm.masked.load.v4f64 +;AVX2: fadd <4 x double> +;AVX2: call void @llvm.masked.store.v4f64 +;AVX2: ret void + +;AVX512-LABEL: @foo6 +;AVX512: icmp sgt <8 x i32> %reverse, zeroinitializer +;AVX512: shufflevector <8 x i1>{{.*}}<8 x i32> <i32 7, i32 6, i32 5, i32 4 +;AVX512: call <8 x double> @llvm.masked.load.v8f64 +;AVX512: fadd <8 x double> +;AVX512: call void @llvm.masked.store.v8f64 +;AVX512: ret void + + +define void @foo6(double* %in, double* %out, i32 %size, i32* %trigger) { +entry: + %in.addr = alloca double*, align 8 + %out.addr = alloca double*, align 8 + %size.addr = alloca i32, align 4 + %trigger.addr = alloca i32*, align 8 + %i = alloca i32, align 4 + store double* %in, double** %in.addr, align 8 + store double* %out, double** %out.addr, align 8 + store i32 %size, i32* %size.addr, align 4 + store i32* %trigger, i32** %trigger.addr, align 8 + store i32 4095, i32* %i, align 4 + br label %for.cond + +for.cond: ; preds = %for.inc, %entry + %0 = load i32* %i, align 4 + %cmp = icmp sge i32 %0, 0 + br i1 %cmp, label %for.body, label %for.end + +for.body: ; preds = %for.cond + %1 = load i32* %i, align 4 + %idxprom = sext i32 %1 to i64 + %2 = load i32** %trigger.addr, align 8 + %arrayidx = getelementptr inbounds i32* %2, i64 %idxprom + %3 = load i32* %arrayidx, align 4 + %cmp1 = icmp sgt i32 %3, 0 + br i1 %cmp1, label %if.then, label %if.end + +if.then: ; preds = %for.body + %4 = load i32* %i, align 4 + %idxprom2 = sext i32 %4 to i64 + %5 = load double** %in.addr, align 8 + %arrayidx3 = getelementptr inbounds double* %5, i64 %idxprom2 + %6 = load double* %arrayidx3, align 8 + %add = fadd double %6, 5.000000e-01 + %7 = load i32* %i, align 4 + %idxprom4 = sext i32 %7 to i64 + %8 = load double** %out.addr, align 8 + %arrayidx5 = getelementptr inbounds double* %8, i64 %idxprom4 + store double %add, double* %arrayidx5, align 8 + br label %if.end + +if.end: ; preds = %if.then, %for.body + br label %for.inc + +for.inc: ; preds = %if.end + %9 = load i32* %i, align 4 + %dec = add nsw i32 %9, -1 + store i32 %dec, i32* %i, align 4 + br label %for.cond + +for.end: ; preds = %for.cond + ret void +} + + _______________________________________________ llvm-branch-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/llvm-branch-commits
