Author: tstellar Date: Tue Apr 28 14:12:11 2015 New Revision: 236017 URL: http://llvm.org/viewvc/llvm-project?rev=236017&view=rev Log: Merging r229507:
------------------------------------------------------------------------ r229507 | thomas.stellard | 2015-02-17 11:36:00 -0500 (Tue, 17 Feb 2015) | 2 lines R600/SI: Extend private extload pattern to include zext loads ------------------------------------------------------------------------ Added: llvm/branches/release_36/test/CodeGen/R600/extload-private.ll Modified: llvm/branches/release_36/lib/Target/R600/AMDGPUInstructions.td Modified: llvm/branches/release_36/lib/Target/R600/AMDGPUInstructions.td URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/lib/Target/R600/AMDGPUInstructions.td?rev=236017&r1=236016&r2=236017&view=diff ============================================================================== --- llvm/branches/release_36/lib/Target/R600/AMDGPUInstructions.td (original) +++ llvm/branches/release_36/lib/Target/R600/AMDGPUInstructions.td Tue Apr 28 14:12:11 2015 @@ -164,10 +164,6 @@ class PrivateStore <SDPatternOperator op (ops node:$value, node:$ptr), (op node:$value, node:$ptr) >; -def extloadi8_private : PrivateLoad <extloadi8>; -def sextloadi8_private : PrivateLoad <sextloadi8>; -def extloadi16_private : PrivateLoad <extloadi16>; -def sextloadi16_private : PrivateLoad <sextloadi16>; def load_private : PrivateLoad <load>; def truncstorei8_private : PrivateStore <truncstorei8>; @@ -231,6 +227,9 @@ def sextloadi8_local : PatFrag<(ops node return isLocalLoad(dyn_cast<LoadSDNode>(N)); }]>; +def extloadi8_private : PrivateLoad <az_extloadi8>; +def sextloadi8_private : PrivateLoad <sextloadi8>; + def az_extloadi16 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{ return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; }]>; @@ -267,6 +266,9 @@ def sextloadi16_local : PatFrag<(ops nod return isLocalLoad(dyn_cast<LoadSDNode>(N)); }]>; +def extloadi16_private : PrivateLoad <az_extloadi16>; +def sextloadi16_private : PrivateLoad <sextloadi16>; + def az_extloadi32 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{ return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; }]>; Added: llvm/branches/release_36/test/CodeGen/R600/extload-private.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/CodeGen/R600/extload-private.ll?rev=236017&view=auto ============================================================================== --- llvm/branches/release_36/test/CodeGen/R600/extload-private.ll (added) +++ llvm/branches/release_36/test/CodeGen/R600/extload-private.ll Tue Apr 28 14:12:11 2015 @@ -0,0 +1,46 @@ +; RUN: llc < %s -march=amdgcn -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s + +; FUNC-LABEL: {{^}}load_i8_sext_private: +; SI: buffer_load_sbyte v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen +define void @load_i8_sext_private(i32 addrspace(1)* %out) { +entry: + %tmp0 = alloca i8 + %tmp1 = load i8* %tmp0 + %tmp2 = sext i8 %tmp1 to i32 + store i32 %tmp2, i32 addrspace(1)* %out + ret void +} + +; FUNC-LABEL: {{^}}load_i8_zext_private: +; SI: buffer_load_ubyte v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen +define void @load_i8_zext_private(i32 addrspace(1)* %out) { +entry: + %tmp0 = alloca i8 + %tmp1 = load i8* %tmp0 + %tmp2 = zext i8 %tmp1 to i32 + store i32 %tmp2, i32 addrspace(1)* %out + ret void +} + +; FUNC-LABEL: {{^}}load_i16_sext_private: +; SI: buffer_load_sshort v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen +define void @load_i16_sext_private(i32 addrspace(1)* %out) { +entry: + %tmp0 = alloca i16 + %tmp1 = load i16* %tmp0 + %tmp2 = sext i16 %tmp1 to i32 + store i32 %tmp2, i32 addrspace(1)* %out + ret void +} + +; FUNC-LABEL: {{^}}load_i16_zext_private: +; SI: buffer_load_ushort v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen +define void @load_i16_zext_private(i32 addrspace(1)* %out) { +entry: + %tmp0 = alloca i16 + %tmp1 = load i16* %tmp0 + %tmp2 = zext i16 %tmp1 to i32 + store i32 %tmp2, i32 addrspace(1)* %out + ret void +} _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-branch-commits