Author: hans
Date: Mon Sep 9 02:48:38 2019
New Revision: 371382
URL: http://llvm.org/viewvc/llvm-project?rev=371382&view=rev
Log:
Merging r370592:
------------------------------------------------------------------------
r370592 | rksimon | 2019-08-31 18:21:31 +0200 (Sat, 31 Aug 2019) | 3 lines
[X86] EltsFromConsecutiveLoads - Don't confuse elt count with vector element
count (PR43170)
EltsFromConsecutiveLoads was assuming that the number of input elts was the
same as the number of elements in the output vector type when creating a
zeroing shuffle, causing an assert when subvectors were being combined instead
of just scalars.
------------------------------------------------------------------------
Modified:
llvm/branches/release_90/ (props changed)
llvm/branches/release_90/lib/Target/X86/X86ISelLowering.cpp
llvm/branches/release_90/test/CodeGen/X86/vector-shuffle-avx512.ll
Propchange: llvm/branches/release_90/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Sep 9 02:48:38 2019
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Pertwee:110850,110961
/llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,366431,366447,366481,366487,366527,366570,366660,366868,366925,367019,367030,367062,367084,367124,367215,367292,367304,367306,367314,367340-367341,367394,367396,367398,367403,367412,367417,367429,367580,367662,367750,367753,367846-367847,367898,367941,368004,368164,368230,368300,368315,368324,368477-368478,368517-368519,368554,368572,368873,369011,369026,369084,369095,369097,369168,369199,369310,369426,369443,369886,370036,370176,370204,370271,370355,370404,370426,370430,370720-370721,370753,371048,371088,371095,371111,371221,371224,371262,371305,371307
+/llvm/trunk:155241,366431,366447,366481,366487,366527,366570,366660,366868,366925,367019,367030,367062,367084,367124,367215,367292,367304,367306,367314,367340-367341,367394,367396,367398,367403,367412,367417,367429,367580,367662,367750,367753,367846-367847,367898,367941,368004,368164,368230,368300,368315,368324,368477-368478,368517-368519,368554,368572,368873,369011,369026,369084,369095,369097,369168,369199,369310,369426,369443,369886,370036,370176,370204,370271,370355,370404,370426,370430,370592,370720-370721,370753,371048,371088,371095,371111,371221,371224,371262,371305,371307
Modified: llvm/branches/release_90/lib/Target/X86/X86ISelLowering.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/lib/Target/X86/X86ISelLowering.cpp?rev=371382&r1=371381&r2=371382&view=diff
==============================================================================
--- llvm/branches/release_90/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/release_90/lib/Target/X86/X86ISelLowering.cpp Mon Sep 9
02:48:38 2019
@@ -7650,17 +7650,22 @@ static SDValue EltsFromConsecutiveLoads(
// IsConsecutiveLoadWithZeros - we need to create a shuffle of the loaded
// vector and a zero vector to clear out the zero elements.
if (!isAfterLegalize && VT.isVector()) {
- SmallVector<int, 4> ClearMask(NumElems, -1);
- for (unsigned i = 0; i < NumElems; ++i) {
- if (ZeroMask[i])
- ClearMask[i] = i + NumElems;
- else if (LoadMask[i])
- ClearMask[i] = i;
+ unsigned NumMaskElts = VT.getVectorNumElements();
+ if ((NumMaskElts % NumElems) == 0) {
+ unsigned Scale = NumMaskElts / NumElems;
+ SmallVector<int, 4> ClearMask(NumMaskElts, -1);
+ for (unsigned i = 0; i < NumElems; ++i) {
+ if (UndefMask[i])
+ continue;
+ int Offset = ZeroMask[i] ? NumMaskElts : 0;
+ for (unsigned j = 0; j != Scale; ++j)
+ ClearMask[(i * Scale) + j] = (i * Scale) + j + Offset;
+ }
+ SDValue V = CreateLoad(VT, LDBase);
+ SDValue Z = VT.isInteger() ? DAG.getConstant(0, DL, VT)
+ : DAG.getConstantFP(0.0, DL, VT);
+ return DAG.getVectorShuffle(VT, DL, V, Z, ClearMask);
}
- SDValue V = CreateLoad(VT, LDBase);
- SDValue Z = VT.isInteger() ? DAG.getConstant(0, DL, VT)
- : DAG.getConstantFP(0.0, DL, VT);
- return DAG.getVectorShuffle(VT, DL, V, Z, ClearMask);
}
}
Modified: llvm/branches/release_90/test/CodeGen/X86/vector-shuffle-avx512.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/test/CodeGen/X86/vector-shuffle-avx512.ll?rev=371382&r1=371381&r2=371382&view=diff
==============================================================================
--- llvm/branches/release_90/test/CodeGen/X86/vector-shuffle-avx512.ll
(original)
+++ llvm/branches/release_90/test/CodeGen/X86/vector-shuffle-avx512.ll Mon Sep
9 02:48:38 2019
@@ -936,3 +936,41 @@ define <16 x float> @test_masked_permps_
%res = select <16 x i1> <i1 1, i1 1, i1 1, i1 0, i1 1, i1 1, i1 0, i1 0, i1
1, i1 1, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0>, <16 x float> %shuf, <16 x float>
%vec2
ret <16 x float> %res
}
+
+%union1= type { <16 x float> }
+@src1 = external dso_local local_unnamed_addr global %union1, align 64
+
+define void @PR43170(<16 x float>* %a0) {
+; SKX64-LABEL: PR43170:
+; SKX64: # %bb.0: # %entry
+; SKX64-NEXT: vmovaps {{.*}}(%rip), %ymm0
+; SKX64-NEXT: vmovaps %zmm0, (%rdi)
+; SKX64-NEXT: vzeroupper
+; SKX64-NEXT: retq
+;
+; KNL64-LABEL: PR43170:
+; KNL64: # %bb.0: # %entry
+; KNL64-NEXT: vmovaps {{.*}}(%rip), %ymm0
+; KNL64-NEXT: vmovaps %zmm0, (%rdi)
+; KNL64-NEXT: retq
+;
+; SKX32-LABEL: PR43170:
+; SKX32: # %bb.0: # %entry
+; SKX32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; SKX32-NEXT: vmovaps src1, %ymm0
+; SKX32-NEXT: vmovaps %zmm0, (%eax)
+; SKX32-NEXT: vzeroupper
+; SKX32-NEXT: retl
+;
+; KNL32-LABEL: PR43170:
+; KNL32: # %bb.0: # %entry
+; KNL32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; KNL32-NEXT: vmovaps src1, %ymm0
+; KNL32-NEXT: vmovaps %zmm0, (%eax)
+; KNL32-NEXT: retl
+entry:
+ %0 = load <8 x float>, <8 x float>* bitcast (%union1* @src1 to <8 x
float>*), align 64
+ %1 = shufflevector <8 x float> %0, <8 x float> zeroinitializer, <16 x i32>
<i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10,
i32 11, i32 12, i32 13, i32 14, i32 15>
+ store <16 x float> %1, <16 x float>* %a0, align 64
+ ret void
+}
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