Author: Scott Linder Date: 2020-12-09T21:09:47Z New Revision: f5f4b8b60fc0931440c4f2549fbff0965c868d2c
URL: https://github.com/llvm/llvm-project/commit/f5f4b8b60fc0931440c4f2549fbff0965c868d2c DIFF: https://github.com/llvm/llvm-project/commit/f5f4b8b60fc0931440c4f2549fbff0965c868d2c.diff LOG: [AMDGPU][MC] Restore old error position for "too few operands" Revert part of https://reviews.llvm.org/D92084 to make it simpler to start consuming the EndOfStatement token within AMDGPU's ParseInstruction in a future patch. This also brings us back to what every other target currently does. A future change to move the position back to the end of the statement would likely need to audit all of the AMDGPUOperand SMLoc ranges, and determine the SMLoc for the last character of the last operand. Reviewed By: dp Differential Revision: https://reviews.llvm.org/D92960 Added: Modified: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp llvm/test/MC/AMDGPU/exp-err.s llvm/test/MC/AMDGPU/gfx10_err_pos.s Removed: ################################################################################ diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 56d97588df6e..8bf6566d40dd 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -4040,7 +4040,7 @@ bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, SMLoc ErrorLoc = IDLoc; if (ErrorInfo != ~0ULL) { if (ErrorInfo >= Operands.size()) { - return Error(getLoc(), "too few operands for instruction"); + return Error(IDLoc, "too few operands for instruction"); } ErrorLoc = ((AMDGPUOperand &)*Operands[ErrorInfo]).getStartLoc(); if (ErrorLoc == SMLoc()) diff --git a/llvm/test/MC/AMDGPU/exp-err.s b/llvm/test/MC/AMDGPU/exp-err.s index b650a78627db..ee83bef0c50b 100644 --- a/llvm/test/MC/AMDGPU/exp-err.s +++ b/llvm/test/MC/AMDGPU/exp-err.s @@ -53,7 +53,7 @@ exp , v3, v2, v1, v0 // GCN: :5: error: unknown token in expression exp -// GCN: :4: error: too few operands for instruction +// GCN: :1: error: too few operands for instruction exp mrt0 s0, v0, v0, v0 // GCN: 10: error: invalid operand for instruction diff --git a/llvm/test/MC/AMDGPU/gfx10_err_pos.s b/llvm/test/MC/AMDGPU/gfx10_err_pos.s index 8d0c3694b285..1d4e52d6c64a 100644 --- a/llvm/test/MC/AMDGPU/gfx10_err_pos.s +++ b/llvm/test/MC/AMDGPU/gfx10_err_pos.s @@ -992,12 +992,12 @@ s_getreg_b32 s2, hwreg(HW_REG_SHADER_CYCLES) tbuffer_store_format_xyzw v[1:4], off, ttmp[4:7] // CHECK: error: too few operands for instruction // CHECK-NEXT:{{^}}tbuffer_store_format_xyzw v[1:4], off, ttmp[4:7] -// CHECK-NEXT:{{^}} ^ +// CHECK-NEXT:{{^}}^ v_add_f32_e64 v0, v1 // CHECK: error: too few operands for instruction // CHECK-NEXT:{{^}}v_add_f32_e64 v0, v1 -// CHECK-NEXT:{{^}} ^ +// CHECK-NEXT:{{^}}^ //============================================================================== // too large value for expcnt _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits