Author: Kazushi (Jam) Marukawa Date: 2020-12-10T15:13:05+09:00 New Revision: e954ba28bcac9dc8d0ffc57d56ffa06ea2cd2f69
URL: https://github.com/llvm/llvm-project/commit/e954ba28bcac9dc8d0ffc57d56ffa06ea2cd2f69 DIFF: https://github.com/llvm/llvm-project/commit/e954ba28bcac9dc8d0ffc57d56ffa06ea2cd2f69.diff LOG: [VE][NFC] Disable VP tests VP tests recently added don't work on Release mode. They work on Debug mode, so I disable them on Release mode to make tests work. Added: Modified: llvm/test/CodeGen/VE/Vector/vp_add.ll llvm/test/CodeGen/VE/Vector/vp_and.ll llvm/test/CodeGen/VE/Vector/vp_ashr.ll llvm/test/CodeGen/VE/Vector/vp_lshr.ll llvm/test/CodeGen/VE/Vector/vp_mul.ll llvm/test/CodeGen/VE/Vector/vp_or.ll llvm/test/CodeGen/VE/Vector/vp_sdiv.ll llvm/test/CodeGen/VE/Vector/vp_shl.ll llvm/test/CodeGen/VE/Vector/vp_srem.ll llvm/test/CodeGen/VE/Vector/vp_sub.ll llvm/test/CodeGen/VE/Vector/vp_udiv.ll llvm/test/CodeGen/VE/Vector/vp_urem.ll llvm/test/CodeGen/VE/Vector/vp_xor.ll Removed: ################################################################################ diff --git a/llvm/test/CodeGen/VE/Vector/vp_add.ll b/llvm/test/CodeGen/VE/Vector/vp_add.ll index b69a1a1bd59f..52808a56fbb3 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_add.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_add.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_add [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_and.ll b/llvm/test/CodeGen/VE/Vector/vp_and.ll index 7507a1a34092..5f7333ffbba2 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_and.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_and.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_and [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_ashr.ll b/llvm/test/CodeGen/VE/Vector/vp_ashr.ll index c4c1def0b56b..cdce387d0d6d 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_ashr.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_ashr.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_ashr [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_lshr.ll b/llvm/test/CodeGen/VE/Vector/vp_lshr.ll index 79e38e0c128e..e42a3b62c891 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_lshr.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_lshr.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_lshr [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_mul.ll b/llvm/test/CodeGen/VE/Vector/vp_mul.ll index 454000e10d0e..c7f8c00b64f0 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_mul.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_mul.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_mul [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_or.ll b/llvm/test/CodeGen/VE/Vector/vp_or.ll index 71cef7d1b8c1..684ac1e5b3d8 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_or.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_or.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_or [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll b/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll index 4fa7ae516d88..2f99c09a1780 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_sdiv [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_shl.ll b/llvm/test/CodeGen/VE/Vector/vp_shl.ll index 84675b640ded..2cb526bd8456 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_shl.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_shl.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_shl [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_srem.ll b/llvm/test/CodeGen/VE/Vector/vp_srem.ll index 952752498007..b52d5edfe759 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_srem.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_srem.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_srem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_sub.ll b/llvm/test/CodeGen/VE/Vector/vp_sub.ll index 575d3dc46752..5e093b2ec10d 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_sub.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_sub.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_sub [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_udiv.ll b/llvm/test/CodeGen/VE/Vector/vp_udiv.ll index 491b398a2d22..e35a41de8f47 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_udiv.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_udiv.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_udiv [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_urem.ll b/llvm/test/CodeGen/VE/Vector/vp_urem.ll index 340d3b4e47b2..9b2b93d18ab3 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_urem.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_urem.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_urem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_xor.ll b/llvm/test/CodeGen/VE/Vector/vp_xor.ll index b743abcec87b..dafac6548bf6 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_xor.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_xor.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_xor [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits