Author: Simon Pilgrim Date: 2021-01-11T15:27:08Z New Revision: a0f82749f4f3373ba85de40c69b866081f77abce
URL: https://github.com/llvm/llvm-project/commit/a0f82749f4f3373ba85de40c69b866081f77abce DIFF: https://github.com/llvm/llvm-project/commit/a0f82749f4f3373ba85de40c69b866081f77abce.diff LOG: [X86] Extend lzcnt-cmp tests to test on non-lzcnt targets Added: Modified: llvm/test/CodeGen/X86/lzcnt-cmp.ll Removed: ################################################################################ diff --git a/llvm/test/CodeGen/X86/lzcnt-cmp.ll b/llvm/test/CodeGen/X86/lzcnt-cmp.ll index 5bf0dbec7510..c094920d59eb 100644 --- a/llvm/test/CodeGen/X86/lzcnt-cmp.ll +++ b/llvm/test/CodeGen/X86/lzcnt-cmp.ll @@ -1,6 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-- -mattr=+lzcnt | FileCheck %s --check-prefixes=X86 -; RUN: llc < %s -mtriple=x86_64-- -mattr=+lzcnt | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,X86-BSR +; RUN: llc < %s -mtriple=i686-- -mattr=+lzcnt | FileCheck %s --check-prefixes=X86,X86-LZCNT +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,X64-BSR +; RUN: llc < %s -mtriple=x86_64-- -mattr=+lzcnt | FileCheck %s --check-prefixes=X64,X64-LZCNT define i1 @lshr_ctlz_cmpeq_one_i64(i64 %in) nounwind { ; X86-LABEL: lshr_ctlz_cmpeq_one_i64: @@ -10,11 +12,27 @@ define i1 @lshr_ctlz_cmpeq_one_i64(i64 %in) nounwind { ; X86-NEXT: sete %al ; X86-NEXT: retl ; -; X64-LABEL: lshr_ctlz_cmpeq_one_i64: -; X64: # %bb.0: -; X64-NEXT: testq %rdi, %rdi -; X64-NEXT: sete %al -; X64-NEXT: retq +; X64-BSR-LABEL: lshr_ctlz_cmpeq_one_i64: +; X64-BSR: # %bb.0: +; X64-BSR-NEXT: testq %rdi, %rdi +; X64-BSR-NEXT: je .LBB0_1 +; X64-BSR-NEXT: # %bb.2: # %cond.false +; X64-BSR-NEXT: bsrq %rdi, %rax +; X64-BSR-NEXT: xorq $63, %rax +; X64-BSR-NEXT: jmp .LBB0_3 +; X64-BSR-NEXT: .LBB0_1: +; X64-BSR-NEXT: movl $64, %eax +; X64-BSR-NEXT: .LBB0_3: # %cond.end +; X64-BSR-NEXT: shrq $6, %rax +; X64-BSR-NEXT: cmpq $1, %rax +; X64-BSR-NEXT: sete %al +; X64-BSR-NEXT: retq +; +; X64-LZCNT-LABEL: lshr_ctlz_cmpeq_one_i64: +; X64-LZCNT: # %bb.0: +; X64-LZCNT-NEXT: testq %rdi, %rdi +; X64-LZCNT-NEXT: sete %al +; X64-LZCNT-NEXT: retq %ctlz = call i64 @llvm.ctlz.i64(i64 %in, i1 0) %lshr = lshr i64 %ctlz, 6 %icmp = icmp eq i64 %lshr, 1 @@ -22,26 +40,48 @@ define i1 @lshr_ctlz_cmpeq_one_i64(i64 %in) nounwind { } define i1 @lshr_ctlz_undef_cmpeq_one_i64(i64 %in) nounwind { -; X86-LABEL: lshr_ctlz_undef_cmpeq_one_i64: -; X86: # %bb.0: -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp) -; X86-NEXT: jne .LBB1_2 -; X86-NEXT: # %bb.1: -; X86-NEXT: lzcntl {{[0-9]+}}(%esp), %eax -; X86-NEXT: addl $32, %eax -; X86-NEXT: .LBB1_2: -; X86-NEXT: testb $64, %al -; X86-NEXT: setne %al -; X86-NEXT: retl +; X86-BSR-LABEL: lshr_ctlz_undef_cmpeq_one_i64: +; X86-BSR: # %bb.0: +; X86-BSR-NEXT: xorl %eax, %eax +; X86-BSR-NEXT: cmpl $0, {{[0-9]+}}(%esp) +; X86-BSR-NEXT: jne .LBB1_2 +; X86-BSR-NEXT: # %bb.1: +; X86-BSR-NEXT: bsrl {{[0-9]+}}(%esp), %eax +; X86-BSR-NEXT: xorl $31, %eax +; X86-BSR-NEXT: addl $32, %eax +; X86-BSR-NEXT: .LBB1_2: +; X86-BSR-NEXT: testl $-64, %eax +; X86-BSR-NEXT: setne %al +; X86-BSR-NEXT: retl ; -; X64-LABEL: lshr_ctlz_undef_cmpeq_one_i64: -; X64: # %bb.0: -; X64-NEXT: lzcntq %rdi, %rax -; X64-NEXT: shrq $6, %rax -; X64-NEXT: cmpl $1, %eax -; X64-NEXT: sete %al -; X64-NEXT: retq +; X86-LZCNT-LABEL: lshr_ctlz_undef_cmpeq_one_i64: +; X86-LZCNT: # %bb.0: +; X86-LZCNT-NEXT: xorl %eax, %eax +; X86-LZCNT-NEXT: cmpl $0, {{[0-9]+}}(%esp) +; X86-LZCNT-NEXT: jne .LBB1_2 +; X86-LZCNT-NEXT: # %bb.1: +; X86-LZCNT-NEXT: lzcntl {{[0-9]+}}(%esp), %eax +; X86-LZCNT-NEXT: addl $32, %eax +; X86-LZCNT-NEXT: .LBB1_2: +; X86-LZCNT-NEXT: testb $64, %al +; X86-LZCNT-NEXT: setne %al +; X86-LZCNT-NEXT: retl +; +; X64-BSR-LABEL: lshr_ctlz_undef_cmpeq_one_i64: +; X64-BSR: # %bb.0: +; X64-BSR-NEXT: bsrq %rdi, %rax +; X64-BSR-NEXT: shrq $6, %rax +; X64-BSR-NEXT: cmpl $1, %eax +; X64-BSR-NEXT: sete %al +; X64-BSR-NEXT: retq +; +; X64-LZCNT-LABEL: lshr_ctlz_undef_cmpeq_one_i64: +; X64-LZCNT: # %bb.0: +; X64-LZCNT-NEXT: lzcntq %rdi, %rax +; X64-LZCNT-NEXT: shrq $6, %rax +; X64-LZCNT-NEXT: cmpl $1, %eax +; X64-LZCNT-NEXT: sete %al +; X64-LZCNT-NEXT: retq %ctlz = call i64 @llvm.ctlz.i64(i64 %in, i1 -1) %lshr = lshr i64 %ctlz, 6 %icmp = icmp eq i64 %lshr, 1 @@ -56,11 +96,26 @@ define i1 @lshr_ctlz_cmpne_zero_i64(i64 %in) nounwind { ; X86-NEXT: sete %al ; X86-NEXT: retl ; -; X64-LABEL: lshr_ctlz_cmpne_zero_i64: -; X64: # %bb.0: -; X64-NEXT: testq %rdi, %rdi -; X64-NEXT: sete %al -; X64-NEXT: retq +; X64-BSR-LABEL: lshr_ctlz_cmpne_zero_i64: +; X64-BSR: # %bb.0: +; X64-BSR-NEXT: testq %rdi, %rdi +; X64-BSR-NEXT: je .LBB2_1 +; X64-BSR-NEXT: # %bb.2: # %cond.false +; X64-BSR-NEXT: bsrq %rdi, %rax +; X64-BSR-NEXT: xorq $63, %rax +; X64-BSR-NEXT: jmp .LBB2_3 +; X64-BSR-NEXT: .LBB2_1: +; X64-BSR-NEXT: movl $64, %eax +; X64-BSR-NEXT: .LBB2_3: # %cond.end +; X64-BSR-NEXT: testq $-64, %rax +; X64-BSR-NEXT: setne %al +; X64-BSR-NEXT: retq +; +; X64-LZCNT-LABEL: lshr_ctlz_cmpne_zero_i64: +; X64-LZCNT: # %bb.0: +; X64-LZCNT-NEXT: testq %rdi, %rdi +; X64-LZCNT-NEXT: sete %al +; X64-LZCNT-NEXT: retq %ctlz = call i64 @llvm.ctlz.i64(i64 %in, i1 0) %lshr = lshr i64 %ctlz, 6 %icmp = icmp ne i64 %lshr, 0 @@ -68,25 +123,46 @@ define i1 @lshr_ctlz_cmpne_zero_i64(i64 %in) nounwind { } define i1 @lshr_ctlz_undef_cmpne_zero_i64(i64 %in) nounwind { -; X86-LABEL: lshr_ctlz_undef_cmpne_zero_i64: -; X86: # %bb.0: -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp) -; X86-NEXT: jne .LBB3_2 -; X86-NEXT: # %bb.1: -; X86-NEXT: lzcntl {{[0-9]+}}(%esp), %eax -; X86-NEXT: addl $32, %eax -; X86-NEXT: .LBB3_2: -; X86-NEXT: testb $64, %al -; X86-NEXT: setne %al -; X86-NEXT: retl +; X86-BSR-LABEL: lshr_ctlz_undef_cmpne_zero_i64: +; X86-BSR: # %bb.0: +; X86-BSR-NEXT: xorl %eax, %eax +; X86-BSR-NEXT: cmpl $0, {{[0-9]+}}(%esp) +; X86-BSR-NEXT: jne .LBB3_2 +; X86-BSR-NEXT: # %bb.1: +; X86-BSR-NEXT: bsrl {{[0-9]+}}(%esp), %eax +; X86-BSR-NEXT: xorl $31, %eax +; X86-BSR-NEXT: addl $32, %eax +; X86-BSR-NEXT: .LBB3_2: +; X86-BSR-NEXT: testl $-64, %eax +; X86-BSR-NEXT: setne %al +; X86-BSR-NEXT: retl ; -; X64-LABEL: lshr_ctlz_undef_cmpne_zero_i64: -; X64: # %bb.0: -; X64-NEXT: lzcntq %rdi, %rax -; X64-NEXT: testb $64, %al -; X64-NEXT: setne %al -; X64-NEXT: retq +; X86-LZCNT-LABEL: lshr_ctlz_undef_cmpne_zero_i64: +; X86-LZCNT: # %bb.0: +; X86-LZCNT-NEXT: xorl %eax, %eax +; X86-LZCNT-NEXT: cmpl $0, {{[0-9]+}}(%esp) +; X86-LZCNT-NEXT: jne .LBB3_2 +; X86-LZCNT-NEXT: # %bb.1: +; X86-LZCNT-NEXT: lzcntl {{[0-9]+}}(%esp), %eax +; X86-LZCNT-NEXT: addl $32, %eax +; X86-LZCNT-NEXT: .LBB3_2: +; X86-LZCNT-NEXT: testb $64, %al +; X86-LZCNT-NEXT: setne %al +; X86-LZCNT-NEXT: retl +; +; X64-BSR-LABEL: lshr_ctlz_undef_cmpne_zero_i64: +; X64-BSR: # %bb.0: +; X64-BSR-NEXT: bsrq %rdi, %rax +; X64-BSR-NEXT: testq $-64, %rax +; X64-BSR-NEXT: setne %al +; X64-BSR-NEXT: retq +; +; X64-LZCNT-LABEL: lshr_ctlz_undef_cmpne_zero_i64: +; X64-LZCNT: # %bb.0: +; X64-LZCNT-NEXT: lzcntq %rdi, %rax +; X64-LZCNT-NEXT: testb $64, %al +; X64-LZCNT-NEXT: setne %al +; X64-LZCNT-NEXT: retq %ctlz = call i64 @llvm.ctlz.i64(i64 %in, i1 -1) %lshr = lshr i64 %ctlz, 6 %icmp = icmp ne i64 %lshr, 0 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits