Author: Simon Pilgrim Date: 2021-01-15T14:42:55Z New Revision: 5183a13d37825f93d92c23c257dbb1c994098bdc
URL: https://github.com/llvm/llvm-project/commit/5183a13d37825f93d92c23c257dbb1c994098bdc DIFF: https://github.com/llvm/llvm-project/commit/5183a13d37825f93d92c23c257dbb1c994098bdc.diff LOG: [X86] Add umin knownbits/demandedbits ult test for D94532 Added: Modified: llvm/test/CodeGen/X86/combine-umin.ll Removed: ################################################################################ diff --git a/llvm/test/CodeGen/X86/combine-umin.ll b/llvm/test/CodeGen/X86/combine-umin.ll index 558d4df9adb4..b22c45bbce45 100644 --- a/llvm/test/CodeGen/X86/combine-umin.ll +++ b/llvm/test/CodeGen/X86/combine-umin.ll @@ -1,11 +1,33 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE42 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE41 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE42 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX + +define i8 @test_demandedbits_umin_ult(i8 %a0, i8 %a1) { +; CHECK-LABEL: test_demandedbits_umin_ult: +; CHECK: # %bb.0: +; CHECK-NEXT: orb $12, %dil +; CHECK-NEXT: orb $4, %sil +; CHECK-NEXT: andb $13, %dil +; CHECK-NEXT: andb $12, %sil +; CHECK-NEXT: movzbl %dil, %ecx +; CHECK-NEXT: movzbl %sil, %eax +; CHECK-NEXT: cmpb %al, %cl +; CHECK-NEXT: cmovbl %ecx, %eax +; CHECK-NEXT: # kill: def $al killed $al killed $eax +; CHECK-NEXT: retq + %lhs0 = and i8 %a0, 13 ; b1101 + %rhs0 = and i8 %a1, 12 ; b1100 + %lhs1 = or i8 %lhs0, 12 ; b1100 + %rhs1 = or i8 %rhs0, 4 ; b0100 + %umin = tail call i8 @llvm.umin.i8(i8 %lhs1, i8 %rhs1) + ret i8 %umin +} +declare i8 @llvm.umin.i8(i8, i8) define <8 x i16> @test_v8i16_nosignbit(<8 x i16> %a, <8 x i16> %b) { ; SSE2-LABEL: test_v8i16_nosignbit: _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits