Author: Amara Emerson Date: 2021-01-15T14:31:39-08:00 New Revision: aa8a2d8a3da3704f82ba4ea3a6e7b463737597e1
URL: https://github.com/llvm/llvm-project/commit/aa8a2d8a3da3704f82ba4ea3a6e7b463737597e1 DIFF: https://github.com/llvm/llvm-project/commit/aa8a2d8a3da3704f82ba4ea3a6e7b463737597e1.diff LOG: [AArch64][GlobalISel] Select immediate fcmp if the zero is on the LHS. Added: Modified: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp llvm/test/CodeGen/AArch64/GlobalISel/select-fcmp.mir Removed: ################################################################################ diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp index 797f33ce2ab4..b24fad35e32b 100644 --- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp @@ -4224,6 +4224,14 @@ AArch64InstructionSelector::emitFPCompare(Register LHS, Register RHS, // to explicitly materialize a constant. const ConstantFP *FPImm = getConstantFPVRegVal(RHS, MRI); bool ShouldUseImm = FPImm && (FPImm->isZero() && !FPImm->isNegative()); + if (!ShouldUseImm) { + // Try commutating the operands. + const ConstantFP *LHSImm = getConstantFPVRegVal(LHS, MRI); + if (LHSImm && (LHSImm->isZero() && !LHSImm->isNegative())) { + ShouldUseImm = true; + std::swap(LHS, RHS); + } + } unsigned CmpOpcTbl[2][2] = {{AArch64::FCMPSrr, AArch64::FCMPDrr}, {AArch64::FCMPSri, AArch64::FCMPDri}}; unsigned CmpOpc = CmpOpcTbl[ShouldUseImm][OpSize == 64]; diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-fcmp.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-fcmp.mir index 45799079f920..c12cd3343c7e 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/select-fcmp.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-fcmp.mir @@ -107,3 +107,30 @@ body: | %3:gpr(s32) = G_FCMP floatpred(oeq), %0(s64), %2 $s0 = COPY %3(s32) RET_ReallyLR implicit $s0 +... + +--- +name: zero_lhs +alignment: 4 +legalized: true +regBankSelected: true +tracksRegLiveness: true +body: | + bb.1: + liveins: $s0, $s1 + + ; CHECK-LABEL: name: zero_lhs + ; CHECK: liveins: $s0, $s1 + ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 + ; CHECK: FCMPSri [[COPY]], implicit-def $nzcv + ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv + ; CHECK: $s0 = COPY [[CSINCWr]] + ; CHECK: RET_ReallyLR implicit $s0 + %0:fpr(s32) = COPY $s0 + %1:fpr(s32) = COPY $s1 + %2:fpr(s32) = G_FCONSTANT float 0.000000e+00 + %3:gpr(s32) = G_FCMP floatpred(oeq), %2(s32), %0 + $s0 = COPY %3(s32) + RET_ReallyLR implicit $s0 + +... _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits