Author: Timm Bäder Date: 2021-06-15T15:31:14-07:00 New Revision: f78f530bd38472f6bd058a0307484fc5edc57b7c
URL: https://github.com/llvm/llvm-project/commit/f78f530bd38472f6bd058a0307484fc5edc57b7c DIFF: https://github.com/llvm/llvm-project/commit/f78f530bd38472f6bd058a0307484fc5edc57b7c.diff LOG: [llvm][PPC] Add missing case for 'I' asm memory operands >From https://llvm.org/docs/LangRef.html#asm-template-argument-modifiers: I: Print the letter ‘i’ if the operand is an integer constant, otherwise nothing. Used to print ‘addi’ vs ‘add’ instructions. Differential Revision: https://reviews.llvm.org/D103968 (cherry picked from commit a9e4f91adf59bbc72541b96dd30245eaeeedf3ce) Added: llvm/test/CodeGen/PowerPC/asm-template-I.ll Modified: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Removed: ################################################################################ diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp index cce21f32414a8..6257709731b9a 100644 --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -321,6 +321,12 @@ bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, O << "0, "; printOperand(MI, OpNo, O); return false; + case 'I': + // Write 'i' if an integer constant, otherwise nothing. Used to print + // addi vs add, etc. + if (MI->getOperand(OpNo).isImm()) + O << "i"; + return false; case 'U': // Print 'u' for update form. case 'X': // Print 'x' for indexed form. // FIXME: Currently for PowerPC memory operands are always loaded diff --git a/llvm/test/CodeGen/PowerPC/asm-template-I.ll b/llvm/test/CodeGen/PowerPC/asm-template-I.ll new file mode 100644 index 0000000000000..f77e6900efc03 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/asm-template-I.ll @@ -0,0 +1,19 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-- | FileCheck %s +; https://bugs.llvm.org/show_bug.cgi?id=50608 + +define dso_local signext i32 @main(i32 signext %argc, i8** %argv) { +; CHECK-LABEL: main: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: stw 3, -4(1) +; CHECK-NEXT: li 3, 0 +; CHECK-NEXT: addi 4, 1, -4 +; CHECK-NEXT: #APP +; CHECK-NEXT: .ascii "-1@0(4)" +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: #NO_APP +; CHECK-NEXT: blr +entry: + call void asm sideeffect " .asciz \22${0:n}@${1:I}$1\22 ", "n,nZr"(i32 1, i32 %argc) + ret i32 0 +} _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
