Author: Simon Pilgrim Date: 2022-08-15T09:31:26+02:00 New Revision: 804e4538577fe667454285c88f212abfe58516d5
URL: https://github.com/llvm/llvm-project/commit/804e4538577fe667454285c88f212abfe58516d5 DIFF: https://github.com/llvm/llvm-project/commit/804e4538577fe667454285c88f212abfe58516d5.diff LOG: [X86] Add RDPRU instruction CPUID bit masks As mentioned on D128934 - we weren't including the CPUID bit handling for the RDPRU instruction AMD's APMv3 (24594) lists it as CPUID Fn8000_0008_EBX Bit#4 (cherry picked from commit 08a880509e4f7ca8d346dce42fe7528c3a33f22c) Added: Modified: clang/lib/Headers/cpuid.h llvm/lib/Support/Host.cpp Removed: ################################################################################ diff --git a/clang/lib/Headers/cpuid.h b/clang/lib/Headers/cpuid.h index 5d262a60735f2..caa0069c2e1fa 100644 --- a/clang/lib/Headers/cpuid.h +++ b/clang/lib/Headers/cpuid.h @@ -232,6 +232,7 @@ /* Features in %ebx for leaf 0x80000008 */ #define bit_CLZERO 0x00000001 +#define bit_RDPRU 0x00000010 #define bit_WBNOINVD 0x00000200 diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp index c97f273b07398..94a1536f46900 100644 --- a/llvm/lib/Support/Host.cpp +++ b/llvm/lib/Support/Host.cpp @@ -1734,6 +1734,7 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) { bool HasExtLeaf8 = MaxExtLevel >= 0x80000008 && !getX86CpuIDAndInfo(0x80000008, &EAX, &EBX, &ECX, &EDX); Features["clzero"] = HasExtLeaf8 && ((EBX >> 0) & 1); + Features["rdpru"] = HasExtLeaf8 && ((EBX >> 4) & 1); Features["wbnoinvd"] = HasExtLeaf8 && ((EBX >> 9) & 1); bool HasLeaf7 = _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
