MatzeB wrote:

I still feel like I am missing something here, and it's been a while since I 
looked at this. But my impression is that LLVM modeling is "cheating" a bit in 
that technically all the callee-saves should be implicit-uses of the return 
instruction (and not live afterwards) but we don't model it that way and 
instead make them appear as live-outs of the return block? So doesn't seem like 
overestimating the liveness because of our current modeling?

If I'm reading your patch correctly it would mean we would start adding all 
pristine registers for the return block. I am just confused so far because this 
is happening in a function called `addLiveOutsNoPristines`...

https://github.com/llvm/llvm-project/pull/73553
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