================ @@ -126,9 +126,10 @@ enum NodeType : unsigned { // Floating point fmax and fmin matching the RISC-V instruction semantics. FMAX, FMIN, - // READ_CYCLE_WIDE - A read of the 64-bit cycle CSR on a 32-bit target - // (returns (Lo, Hi)). It takes a chain operand. - READ_CYCLE_WIDE, + // A read of the 64-bit counter CSR on a 32-bit target (returns (Lo, Hi)). + // It takes a chain operand. ---------------- topperc wrote:
Comment should mention the new operands https://github.com/llvm/llvm-project/pull/82322 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits