================
@@ -0,0 +1,53 @@
+; RUN: opt -S -dxil-op-lower %s | FileCheck %s
+
+target triple = "dxil-pc-shadermodel6.0-compute"
+
+declare i32 @some_val();
+
+define void @test_buffers() {
+ ; RWBuffer<float4> Buf : register(u5, space3)
+ %typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
+ @llvm.dx.handle.fromBinding.tdx.TypedBuffer_v4f32_1_0_0(
+ i32 3, i32 5, i32 1, i32 4, i1 false)
+ ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 1, i32
4, i1 false)
+ ; CHECK-NOT: @llvm.dx.cast.handle
+
+ ; RWBuffer<int> Buf : register(u7, space2)
+ %typed1 = call target("dx.TypedBuffer", i32, 1, 0, 1)
+ @llvm.dx.handle.fromBinding.tdx.TypedBuffer_i32_1_0_1t(
+ i32 2, i32 7, i32 1, i32 6, i1 false)
+ ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 0, i32
6, i1 false)
+
+ ; Buffer<uint4> Buf[24] : register(t3, space5)
+ ; Buffer<uint4> typed2 = Buf[5]
+ ; Note that the index below is 3 + 4 = 7
----------------
dmpots wrote:
Is this comment out of sync with the line above? Meaning should the line above
be `Buf[4]`? I'm not seeing where the 4 comes from otherwise.
https://github.com/llvm/llvm-project/pull/104251
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