================
@@ -310,7 +310,7 @@ bool
AMDGPURegBankLegalize::runOnMachineFunction(MachineFunction &MF) {
// Opcodes that support pretty much all combinations of reg banks and LLTs
// (except S1). There is no point in writing rules for them.
if (Opc == AMDGPU::G_BUILD_VECTOR || Opc == AMDGPU::G_UNMERGE_VALUES ||
- Opc == AMDGPU::G_MERGE_VALUES) {
+ Opc == AMDGPU::G_MERGE_VALUES || Opc == G_BITCAST) {
----------------
arsenm wrote:
Probably should consistently qualify the enum value. Also this will need to
cover freeze eventually?
https://github.com/llvm/llvm-project/pull/132385
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