llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-bolt @llvm/pr-subscribers-backend-aarch64 Author: Fangrui Song (MaskRay) <details> <summary>Changes</summary> Rename these relocation specifier constants, aligning with the naming convention used by other targets (`S_` instead of `VK_`). * ELF/COFF: AArch64MCExpr::VK_ => AArch64::S_ (VK_ABS/VK_PAGE_ABS are also used by Mach-O as a hack) * Mach-O: AArch64MCExpr::M_ => AArch64::S_MACHO_ * shared: AArch64MCExpr::None => AArch64::S_None Apologies for the churn following the recent rename in #<!-- -->132595. This change ensures consistency after introducing MCSpecifierExpr to replace MCTargetSpecifier subclasses. --- Patch is 95.55 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/144633.diff 14 Files Affected: - (modified) bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp (+11-11) - (modified) llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp (+7-7) - (modified) llvm/lib/Target/AArch64/AArch64MCInstLower.cpp (+37-38) - (modified) llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp (+5-5) - (modified) llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (+124-136) - (modified) llvm/lib/Target/AArch64/Disassembler/AArch64ExternalSymbolizer.cpp (+10-10) - (modified) llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp (+15-16) - (modified) llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp (+108-112) - (modified) llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp (+70-70) - (modified) llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h (+149-3) - (modified) llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp (+10-11) - (modified) llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h (-144) - (modified) llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp (+13-13) - (modified) llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp (+5-5) ``````````diff diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp index e6e0aeba34572..612c1304efd60 100644 --- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp +++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp @@ -1081,7 +1081,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { if (isADR(Inst) || RelType == ELF::R_AARCH64_ADR_PREL_LO21 || RelType == ELF::R_AARCH64_TLSDESC_ADR_PREL21) { - return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS, Ctx); + return MCSpecifierExpr::create(Expr, AArch64::S_ABS, Ctx); } else if (isADRP(Inst) || RelType == ELF::R_AARCH64_ADR_PREL_PG_HI21 || RelType == ELF::R_AARCH64_ADR_PREL_PG_HI21_NC || RelType == ELF::R_AARCH64_TLSDESC_ADR_PAGE21 || @@ -1089,7 +1089,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { RelType == ELF::R_AARCH64_ADR_GOT_PAGE) { // Never emit a GOT reloc, we handled this in // RewriteInstance::readRelocations(). - return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_PAGE, Ctx); + return MCSpecifierExpr::create(Expr, AArch64::S_ABS_PAGE, Ctx); } else { switch (RelType) { case ELF::R_AARCH64_ADD_ABS_LO12_NC: @@ -1103,18 +1103,18 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { case ELF::R_AARCH64_TLSDESC_LD64_LO12: case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC: - return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_LO12, Ctx); + return MCSpecifierExpr::create(Expr, AArch64::S_LO12, Ctx); case ELF::R_AARCH64_MOVW_UABS_G3: - return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G3, Ctx); + return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G3, Ctx); case ELF::R_AARCH64_MOVW_UABS_G2: case ELF::R_AARCH64_MOVW_UABS_G2_NC: - return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G2_NC, Ctx); + return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G2_NC, Ctx); case ELF::R_AARCH64_MOVW_UABS_G1: case ELF::R_AARCH64_MOVW_UABS_G1_NC: - return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G1_NC, Ctx); + return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G1_NC, Ctx); case ELF::R_AARCH64_MOVW_UABS_G0: case ELF::R_AARCH64_MOVW_UABS_G0_NC: - return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G0_NC, Ctx); + return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G0_NC, Ctx); default: break; } @@ -2028,7 +2028,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { Inst.setOpcode(AArch64::MOVZXi); Inst.addOperand(MCOperand::createReg(AArch64::X16)); Inst.addOperand(MCOperand::createExpr( - MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G3, *Ctx))); + MCSpecifierExpr::create(Target, AArch64::S_ABS_G3, *Ctx))); Inst.addOperand(MCOperand::createImm(0x30)); Seq.emplace_back(Inst); @@ -2037,7 +2037,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { Inst.addOperand(MCOperand::createReg(AArch64::X16)); Inst.addOperand(MCOperand::createReg(AArch64::X16)); Inst.addOperand(MCOperand::createExpr( - MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G2_NC, *Ctx))); + MCSpecifierExpr::create(Target, AArch64::S_ABS_G2_NC, *Ctx))); Inst.addOperand(MCOperand::createImm(0x20)); Seq.emplace_back(Inst); @@ -2046,7 +2046,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { Inst.addOperand(MCOperand::createReg(AArch64::X16)); Inst.addOperand(MCOperand::createReg(AArch64::X16)); Inst.addOperand(MCOperand::createExpr( - MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G1_NC, *Ctx))); + MCSpecifierExpr::create(Target, AArch64::S_ABS_G1_NC, *Ctx))); Inst.addOperand(MCOperand::createImm(0x10)); Seq.emplace_back(Inst); @@ -2055,7 +2055,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { Inst.addOperand(MCOperand::createReg(AArch64::X16)); Inst.addOperand(MCOperand::createReg(AArch64::X16)); Inst.addOperand(MCOperand::createExpr( - MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G0_NC, *Ctx))); + MCSpecifierExpr::create(Target, AArch64::S_ABS_G0_NC, *Ctx))); Inst.addOperand(MCOperand::createImm(0)); Seq.emplace_back(Inst); diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp index a16c104d8bef5..dd10050592190 100644 --- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp +++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp @@ -19,7 +19,7 @@ #include "AArch64TargetObjectFile.h" #include "MCTargetDesc/AArch64AddressingModes.h" #include "MCTargetDesc/AArch64InstPrinter.h" -#include "MCTargetDesc/AArch64MCExpr.h" +#include "MCTargetDesc/AArch64MCAsmInfo.h" #include "MCTargetDesc/AArch64MCTargetDesc.h" #include "MCTargetDesc/AArch64TargetStreamer.h" #include "TargetInfo/AArch64TargetInfo.h" @@ -910,15 +910,15 @@ void AArch64AsmPrinter::emitHwasanMemaccessSymbols(Module &M) { // have a chance to save them. EmitToStreamer(MCInstBuilder(AArch64::ADRP) .addReg(AArch64::X16) - .addExpr(MCSpecifierExpr::create( - HwasanTagMismatchRef, AArch64MCExpr::VK_GOT_PAGE, - OutContext))); + .addExpr(MCSpecifierExpr::create(HwasanTagMismatchRef, + AArch64::S_GOT_PAGE, + OutContext))); EmitToStreamer(MCInstBuilder(AArch64::LDRXui) .addReg(AArch64::X16) .addReg(AArch64::X16) - .addExpr(MCSpecifierExpr::create( - HwasanTagMismatchRef, AArch64MCExpr::VK_GOT_LO12, - OutContext))); + .addExpr(MCSpecifierExpr::create(HwasanTagMismatchRef, + AArch64::S_GOT_LO12, + OutContext))); EmitToStreamer(MCInstBuilder(AArch64::BR).addReg(AArch64::X16)); } } diff --git a/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp b/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp index fd3ce6c72e508..f864404c1fd20 100644 --- a/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp +++ b/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp @@ -13,7 +13,7 @@ #include "AArch64MCInstLower.h" #include "AArch64MachineFunctionInfo.h" -#include "MCTargetDesc/AArch64MCExpr.h" +#include "MCTargetDesc/AArch64MCAsmInfo.h" #include "Utils/AArch64BaseInfo.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineBasicBlock.h" @@ -147,29 +147,29 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandMachO(const MachineOperand &MO, MCSymbol *Sym) const { // FIXME: We would like an efficient form for this, so we don't have to do a // lot of extra uniquing. - auto Spec = AArch64MCExpr::None; + auto Spec = AArch64::S_None; if ((MO.getTargetFlags() & AArch64II::MO_GOT) != 0) { if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE) - Spec = AArch64MCExpr::M_GOTPAGE; + Spec = AArch64::S_MACHO_GOTPAGE; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGEOFF) - Spec = AArch64MCExpr::M_GOTPAGEOFF; + Spec = AArch64::S_MACHO_GOTPAGEOFF; else llvm_unreachable("Unexpected target flags with MO_GOT on GV operand"); } else if ((MO.getTargetFlags() & AArch64II::MO_TLS) != 0) { if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE) - Spec = AArch64MCExpr::M_TLVPPAGE; + Spec = AArch64::S_MACHO_TLVPPAGE; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGEOFF) - Spec = AArch64MCExpr::M_TLVPPAGEOFF; + Spec = AArch64::S_MACHO_TLVPPAGEOFF; else llvm_unreachable("Unexpected target flags with MO_TLS on GV operand"); } else { if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE) - Spec = AArch64MCExpr::M_PAGE; + Spec = AArch64::S_MACHO_PAGE; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGEOFF) - Spec = AArch64MCExpr::M_PAGEOFF; + Spec = AArch64::S_MACHO_PAGEOFF; } // TODO: Migrate to MCSpecifierExpr::create like ELF. const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Spec, Ctx); @@ -186,8 +186,8 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO, if (MO.getTargetFlags() & AArch64II::MO_GOT) { const MachineFunction *MF = MO.getParent()->getParent()->getParent(); RefFlags |= (MF->getInfo<AArch64FunctionInfo>()->hasELFSignedGOT() - ? AArch64MCExpr::VK_GOT_AUTH - : AArch64MCExpr::VK_GOT); + ? AArch64::S_GOT_AUTH + : AArch64::S_GOT); } else if (MO.getTargetFlags() & AArch64II::MO_TLS) { TLSModel::Model Model; if (MO.isGlobal()) { @@ -211,13 +211,13 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO, } switch (Model) { case TLSModel::InitialExec: - RefFlags |= AArch64MCExpr::VK_GOTTPREL; + RefFlags |= AArch64::S_GOTTPREL; break; case TLSModel::LocalExec: - RefFlags |= AArch64MCExpr::VK_TPREL; + RefFlags |= AArch64::S_TPREL; break; case TLSModel::LocalDynamic: - RefFlags |= AArch64MCExpr::VK_DTPREL; + RefFlags |= AArch64::S_DTPREL; break; case TLSModel::GeneralDynamic: { // TODO: it's probably better to introduce MO_TLS_AUTH or smth and avoid @@ -226,37 +226,37 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO, // making the field wider breaks static assertions. const MachineFunction *MF = MO.getParent()->getParent()->getParent(); RefFlags |= MF->getInfo<AArch64FunctionInfo>()->hasELFSignedGOT() - ? AArch64MCExpr::VK_TLSDESC_AUTH - : AArch64MCExpr::VK_TLSDESC; + ? AArch64::S_TLSDESC_AUTH + : AArch64::S_TLSDESC; break; } } } else if (MO.getTargetFlags() & AArch64II::MO_PREL) { - RefFlags |= AArch64MCExpr::VK_PREL; + RefFlags |= AArch64::S_PREL; } else { // No modifier means this is a generic reference, classified as absolute for // the cases where it matters (:abs_g0: etc). - RefFlags |= AArch64MCExpr::VK_ABS; + RefFlags |= AArch64::S_ABS; } if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE) - RefFlags |= AArch64MCExpr::VK_PAGE; + RefFlags |= AArch64::S_PAGE; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGEOFF) - RefFlags |= AArch64MCExpr::VK_PAGEOFF; + RefFlags |= AArch64::S_PAGEOFF; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G3) - RefFlags |= AArch64MCExpr::VK_G3; + RefFlags |= AArch64::S_G3; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G2) - RefFlags |= AArch64MCExpr::VK_G2; + RefFlags |= AArch64::S_G2; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G1) - RefFlags |= AArch64MCExpr::VK_G1; + RefFlags |= AArch64::S_G1; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G0) - RefFlags |= AArch64MCExpr::VK_G0; + RefFlags |= AArch64::S_G0; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_HI12) - RefFlags |= AArch64MCExpr::VK_HI12; + RefFlags |= AArch64::S_HI12; if (MO.getTargetFlags() & AArch64II::MO_NC) - RefFlags |= AArch64MCExpr::VK_NC; + RefFlags |= AArch64::S_NC; const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx); if (!MO.isJTI() && MO.getOffset()) @@ -276,31 +276,31 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO, if (MO.getTargetFlags() & AArch64II::MO_TLS) { if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGEOFF) - RefFlags |= AArch64MCExpr::VK_SECREL_LO12; + RefFlags |= AArch64::S_SECREL_LO12; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_HI12) - RefFlags |= AArch64MCExpr::VK_SECREL_HI12; + RefFlags |= AArch64::S_SECREL_HI12; } else if (MO.getTargetFlags() & AArch64II::MO_S) { - RefFlags |= AArch64MCExpr::VK_SABS; + RefFlags |= AArch64::S_SABS; } else { - RefFlags |= AArch64MCExpr::VK_ABS; + RefFlags |= AArch64::S_ABS; if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE) - RefFlags |= AArch64MCExpr::VK_PAGE; + RefFlags |= AArch64::S_PAGE; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGEOFF) - RefFlags |= AArch64MCExpr::VK_PAGEOFF | AArch64MCExpr::VK_NC; + RefFlags |= AArch64::S_PAGEOFF | AArch64::S_NC; } if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G3) - RefFlags |= AArch64MCExpr::VK_G3; + RefFlags |= AArch64::S_G3; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G2) - RefFlags |= AArch64MCExpr::VK_G2; + RefFlags |= AArch64::S_G2; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G1) - RefFlags |= AArch64MCExpr::VK_G1; + RefFlags |= AArch64::S_G1; else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G0) - RefFlags |= AArch64MCExpr::VK_G0; + RefFlags |= AArch64::S_G0; // FIXME: Currently we only set VK_NC for MO_G3/MO_G2/MO_G1/MO_G0. This is // because setting VK_NC for others would mean setting their respective @@ -309,7 +309,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO, auto MOFrag = (MO.getTargetFlags() & AArch64II::MO_FRAGMENT); if (MOFrag == AArch64II::MO_G3 || MOFrag == AArch64II::MO_G2 || MOFrag == AArch64II::MO_G1 || MOFrag == AArch64II::MO_G0) - RefFlags |= AArch64MCExpr::VK_NC; + RefFlags |= AArch64::S_NC; } const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx); @@ -318,8 +318,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO, Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx); auto RefKind = static_cast<AArch64MCExpr::Specifier>(RefFlags); - assert(RefKind != AArch64MCExpr::VK_INVALID && - "Invalid relocation requested"); + assert(RefKind != AArch64::S_INVALID && "Invalid relocation requested"); Expr = MCSpecifierExpr::create(Expr, RefKind, Ctx); return MCOperand::createExpr(Expr); diff --git a/llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp b/llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp index b9ba2a41877ec..c218831ce0400 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp @@ -8,7 +8,7 @@ #include "AArch64TargetObjectFile.h" #include "AArch64TargetMachine.h" -#include "MCTargetDesc/AArch64MCExpr.h" +#include "MCTargetDesc/AArch64MCAsmInfo.h" #include "MCTargetDesc/AArch64TargetStreamer.h" #include "llvm/BinaryFormat/Dwarf.h" #include "llvm/CodeGen/MachineModuleInfoImpls.h" @@ -25,7 +25,7 @@ using namespace dwarf; void AArch64_ELFTargetObjectFile::Initialize(MCContext &Ctx, const TargetMachine &TM) { TargetLoweringObjectFileELF::Initialize(Ctx, TM); - PLTRelativeSpecifier = AArch64MCExpr::VK_PLT; + PLTRelativeSpecifier = AArch64::S_PLT; SupportIndirectSymViaGOTPCRel = true; // AARCH64 ELF ABI does not define static relocation type for TLS offset @@ -61,7 +61,7 @@ const MCExpr *AArch64_ELFTargetObjectFile::getIndirectSymViaGOTPCRel( int64_t Offset, MachineModuleInfo *MMI, MCStreamer &Streamer) const { int64_t FinalOffset = Offset + MV.getConstant(); const MCExpr *Res = - MCSymbolRefExpr::create(Sym, AArch64MCExpr::VK_GOTPCREL, getContext()); + MCSymbolRefExpr::create(Sym, AArch64::S_GOTPCREL, getContext()); const MCExpr *Off = MCConstantExpr::create(FinalOffset, getContext()); return MCBinaryExpr::createAdd(Res, Off, getContext()); } @@ -80,7 +80,7 @@ const MCExpr *AArch64_MachoTargetObjectFile::getTTypeGlobalReference( if (Encoding & (DW_EH_PE_indirect | DW_EH_PE_pcrel)) { const MCSymbol *Sym = TM.getSymbol(GV); const MCExpr *Res = - MCSymbolRefExpr::create(Sym, AArch64MCExpr::M_GOT, getContext()); + MCSymbolRefExpr::create(Sym, AArch64::S_MACHO_GOT, getContext()); MCSymbol *PCSym = getContext().createTempSymbol(); Streamer.emitLabel(PCSym); const MCExpr *PC = MCSymbolRefExpr::create(PCSym, getContext()); @@ -105,7 +105,7 @@ const MCExpr *AArch64_MachoTargetObjectFile::getIndirectSymViaGOTPCRel( // On ARM64 Darwin, we can reference symbols with foo@GOT-., which // is an indirect pc-relative reference. const MCExpr *Res = - MCSymbolRefExpr::create(Sym, AArch64MCExpr::M_GOT, getContext()); + MCSymbolRefExpr::create(Sym, AArch64::S_MACHO_GOT, getContext()); MCSymbol *PCSym = getContext().createTempSymbol(); Streamer.emitLabel(PCSym); const MCExpr *PC = MCSymbolRefExpr::create(PCSym, getContext()); diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index faa82abbd898a..f16fc6cfefa42 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -9,7 +9,7 @@ #include "AArch64InstrInfo.h" #include "MCTargetDesc/AArch64AddressingModes.h" #include "MCTargetDesc/AArch64InstPrinter.h" -#include "MCTargetDesc/AArch64MCExpr.h" +#include "MCTargetDesc/AArch64MCAsmInfo.h" #include "MCTargetDesc/AArch64MCTargetDesc.h" #include "MCTargetDesc/AArch64TargetStreamer.h" #include "TargetInfo/AArch64TargetInfo.h" @@ -901,22 +901,21 @@ class AArch64Operand : public MCParsedAsmOperand { return true; } - if (DarwinSpec == AArch64MCExpr::M_PAGEOFF || + if (DarwinSpec == AArch64::S_MACHO_PAGEOFF || llvm::is_contained( - {AArch64MCExpr::VK_LO12, AArch64MCExpr::VK_GOT_LO12, - AArch64MCExpr::VK_GOT_AUTH_LO12, AArch64MCExpr::VK_DTPREL_LO12, - AArch64MCExpr::VK_DTPREL_LO12_NC, AArch64MCExpr::VK_TPREL_LO12, - AArch64MCExpr::VK_TPREL_LO12_NC, - AArch64MCExpr::VK_GOTTPREL_LO12_NC, AArch64MCExpr::VK_TLSDESC_LO12, - AArch64MCExpr::VK_TLSDESC_AUTH_LO12, AArch64MCExpr::VK_SECREL_LO12, - AArch64MCExpr::VK_SECREL_HI12, AArch64MCExpr::VK_GOT_PAGE_LO15}, + {AArch64::S_LO12, AArch64::S_GOT_LO12, AArch64::S_GOT_AUTH_LO12, + AArch64::S_DTPREL_LO12, AArch64::S_DTPREL_LO12_NC, + AArch64::S_TPREL_LO12, AArch64::S_TPREL_LO12_NC, + AArch64::S_GOTTPREL_LO12_NC, AArch64::S_TLSDESC_LO12, + AArch64::S_TLSDESC_AUTH_LO12, AArch64::S_SECREL_LO12, + AArch64::S_SECREL_HI12, AArch64::S_GOT_PAGE_LO15}, ELFSpec)) { // Note that we don't range-check the addend. It's adjusted modulo page // size when converted, so there is no "out of range" condition when using // @pageoff. return true; - } else if (DarwinSpec == AArch64MCExpr::M_GOTPAGEOFF || - DarwinSpec == AArch64MCExpr::M_TLVPPAGEOFF) { + } else if (DarwinSpec == AArch64::S_MACHO_GOTPAGEOFF || + DarwinSpec == AArch64::S_MACHO_TLVPPAGEOFF) { // @gotpageoff/@tlvppageoff can only be used directly, not with an addend. return Addend == 0; } @@ -1013,18 +1012,16 @@ class AArch64Operand : public MCParsedAsmOperand { int64_t Addend; if (AArch64AsmParser::classifySymbolRef(Expr, ELFSpec, DarwinSpec, Addend)) { - return DarwinSpec == AArch64MCExpr::M_PAGEOFF || - DarwinSpec == AArch64MCExpr::M_TLVPPAGEOFF || - (DarwinSpec == AArch64MCExpr::M_GOTPAGEOFF && Addend == 0) || + return DarwinSpec == AArch64::S_MACHO_PAGEOFF || + ... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/144633 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
