================
@@ -150,8 +150,10 @@ void AArch64BranchTargets::addBTI(MachineBasicBlock &MBB,
bool CouldCall,
++MBBI)
;
- // SCTLR_EL1.BT[01] is set to 0 by default which means
- // PACI[AB]SP are implicitly BTI C so no BTI C instruction is needed there.
+ // PACI[AB]SP are compatible with BTI c, independently of SCTLR_EL1.BT[01].
+ // If SCTLR_EL1.BT[01] is set to 1, they are compatible with BTI jc, but we
+ // cannot rely on that it compile time. Therefore, we can only skip adding a
+ // BTI c for these.
----------------
peterwaller-arm wrote:
I found this comment hard to parse - suggested some alternate language here.
> `PACI[AB]SP` are implicitly `BTI c` so insertion of a BTI can be skipped in
> that case.
> However, depending on the runtime variable `SCTLR_EL1.BT[01]`, they are not
> equivalent to a `BTI jc`, which still requires an additional BTI.
https://github.com/llvm/llvm-project/pull/167306
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