llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-x86 Author: Aiden Grossman (boomanaiden154) <details> <summary>Changes</summary> Title. Test coverage also added. --- Full diff: https://github.com/llvm/llvm-project/pull/173760.diff 6 Files Affected: - (modified) llvm/lib/Target/X86/X86.h (+8-2) - (modified) llvm/lib/Target/X86/X86OptimizeLEAs.cpp (+83-47) - (modified) llvm/lib/Target/X86/X86PassRegistry.def (+1-1) - (modified) llvm/lib/Target/X86/X86TargetMachine.cpp (+2-2) - (modified) llvm/test/CodeGen/X86/pr57673.ll (+2-2) - (modified) llvm/test/CodeGen/X86/pr57673.mir (+2-1) ``````````diff diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h index b062d6948affc..af5d8b5d324fa 100644 --- a/llvm/lib/Target/X86/X86.h +++ b/llvm/lib/Target/X86/X86.h @@ -84,7 +84,13 @@ FunctionPass *createX86FixupVectorConstants(); /// Return a pass that removes redundant LEA instructions and redundant address /// recalculations. -FunctionPass *createX86OptimizeLEAs(); +class X86OptimizeLEAsPass : public PassInfoMixin<X86OptimizeLEAsPass> { +public: + PreservedAnalyses run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM); +}; + +FunctionPass *createX86OptimizeLEAsLegacyPass(); /// Return a pass that transforms setcc + movzx pairs into xor + setcc. FunctionPass *createX86FixupSetCC(); @@ -273,7 +279,7 @@ void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &); void initializeX86LowerAMXIntrinsicsLegacyPassPass(PassRegistry &); void initializeX86LowerAMXTypeLegacyPassPass(PassRegistry &); void initializeX86LowerTileCopyPass(PassRegistry &); -void initializeX86OptimizeLEAPassPass(PassRegistry &); +void initializeX86OptimizeLEAsLegacyPass(PassRegistry &); void initializeX86PartialReductionLegacyPass(PassRegistry &); void initializeX86PreTileConfigPass(PassRegistry &); void initializeX86ReturnThunksPass(PassRegistry &); diff --git a/llvm/lib/Target/X86/X86OptimizeLEAs.cpp b/llvm/lib/Target/X86/X86OptimizeLEAs.cpp index c9646053afac1..6aa6608fba611 100644 --- a/llvm/lib/Target/X86/X86OptimizeLEAs.cpp +++ b/llvm/lib/Target/X86/X86OptimizeLEAs.cpp @@ -52,7 +52,7 @@ using namespace llvm; -#define DEBUG_TYPE "x86-optimize-LEAs" +#define DEBUG_TYPE "x86-optimize-leas" static cl::opt<bool> DisableX86LEAOpt("disable-x86-lea-opt", cl::Hidden, @@ -236,24 +236,10 @@ static inline bool isLEA(const MachineInstr &MI) { namespace { -class X86OptimizeLEAPass : public MachineFunctionPass { +class X86OptimizeLEAsImpl { public: - X86OptimizeLEAPass() : MachineFunctionPass(ID) {} - - StringRef getPassName() const override { return "X86 LEA Optimize"; } - - /// Loop over all of the basic blocks, replacing address - /// calculations in load and store instructions, if it's already - /// been calculated by LEA. Also, remove redundant LEAs. - bool runOnMachineFunction(MachineFunction &MF) override; - - static char ID; - - void getAnalysisUsage(AnalysisUsage &AU) const override { - AU.addRequired<ProfileSummaryInfoWrapperPass>(); - AU.addRequired<LazyMachineBlockFrequencyInfoPass>(); - MachineFunctionPass::getAnalysisUsage(AU); - } + bool runOnMachineFunction(MachineFunction &MF, ProfileSummaryInfo *PSI, + MachineBlockFrequencyInfo *MBFI); private: using MemOpMap = DenseMap<MemOpKey, SmallVector<MachineInstr *, 16>>; @@ -307,16 +293,38 @@ class X86OptimizeLEAPass : public MachineFunctionPass { const X86RegisterInfo *TRI = nullptr; }; +class X86OptimizeLEAsLegacy : public MachineFunctionPass { +public: + X86OptimizeLEAsLegacy() : MachineFunctionPass(ID) {} + + StringRef getPassName() const override { return "X86 LEA Optimize"; } + + /// Loop over all of the basic blocks, replacing address + /// calculations in load and store instructions, if it's already + /// been calculated by LEA. Also, remove redundant LEAs. + bool runOnMachineFunction(MachineFunction &MF) override; + + static char ID; + + void getAnalysisUsage(AnalysisUsage &AU) const override { + AU.addRequired<ProfileSummaryInfoWrapperPass>(); + AU.addRequired<LazyMachineBlockFrequencyInfoPass>(); + MachineFunctionPass::getAnalysisUsage(AU); + } +}; + } // end anonymous namespace -char X86OptimizeLEAPass::ID = 0; +char X86OptimizeLEAsLegacy::ID = 0; -FunctionPass *llvm::createX86OptimizeLEAs() { return new X86OptimizeLEAPass(); } -INITIALIZE_PASS(X86OptimizeLEAPass, DEBUG_TYPE, "X86 optimize LEA pass", false, - false) +FunctionPass *llvm::createX86OptimizeLEAsLegacyPass() { + return new X86OptimizeLEAsLegacy(); +} +INITIALIZE_PASS(X86OptimizeLEAsLegacy, DEBUG_TYPE, "X86 optimize LEA pass", + false, false) -int X86OptimizeLEAPass::calcInstrDist(const MachineInstr &First, - const MachineInstr &Last) { +int X86OptimizeLEAsImpl::calcInstrDist(const MachineInstr &First, + const MachineInstr &Last) { // Both instructions must be in the same basic block and they must be // presented in InstrPos. assert(Last.getParent() == First.getParent() && @@ -336,7 +344,7 @@ int X86OptimizeLEAPass::calcInstrDist(const MachineInstr &First, // 3) Displacement of the new memory operand should fit in 1 byte if possible. // 4) The LEA should be as close to MI as possible, and prior to it if // possible. -bool X86OptimizeLEAPass::chooseBestLEA( +bool X86OptimizeLEAsImpl::chooseBestLEA( const SmallVectorImpl<MachineInstr *> &List, const MachineInstr &MI, MachineInstr *&BestLEA, int64_t &AddrDispShift, int &Dist) { const MCInstrDesc &Desc = MI.getDesc(); @@ -393,10 +401,10 @@ bool X86OptimizeLEAPass::chooseBestLEA( // Get the difference between the addresses' displacements of the two // instructions \p MI1 and \p MI2. The numbers of the first memory operands are // passed through \p N1 and \p N2. -int64_t X86OptimizeLEAPass::getAddrDispShift(const MachineInstr &MI1, - unsigned N1, - const MachineInstr &MI2, - unsigned N2) const { +int64_t X86OptimizeLEAsImpl::getAddrDispShift(const MachineInstr &MI1, + unsigned N1, + const MachineInstr &MI2, + unsigned N2) const { const MachineOperand &Op1 = MI1.getOperand(N1 + X86::AddrDisp); const MachineOperand &Op2 = MI2.getOperand(N2 + X86::AddrDisp); @@ -418,9 +426,9 @@ int64_t X86OptimizeLEAPass::getAddrDispShift(const MachineInstr &MI1, // 2) Def registers of LEAs belong to the same class. // 3) All uses of the Last LEA def register are replaceable, thus the // register is used only as address base. -bool X86OptimizeLEAPass::isReplaceable(const MachineInstr &First, - const MachineInstr &Last, - int64_t &AddrDispShift) const { +bool X86OptimizeLEAsImpl::isReplaceable(const MachineInstr &First, + const MachineInstr &Last, + int64_t &AddrDispShift) const { assert(isLEA(First) && isLEA(Last) && "The function works only with LEA instructions"); @@ -474,8 +482,8 @@ bool X86OptimizeLEAPass::isReplaceable(const MachineInstr &First, return true; } -void X86OptimizeLEAPass::findLEAs(const MachineBasicBlock &MBB, - MemOpMap &LEAs) { +void X86OptimizeLEAsImpl::findLEAs(const MachineBasicBlock &MBB, + MemOpMap &LEAs) { unsigned Pos = 0; for (auto &MI : MBB) { // Assign the position number to the instruction. Note that we are going to @@ -493,7 +501,7 @@ void X86OptimizeLEAPass::findLEAs(const MachineBasicBlock &MBB, // Try to find load and store instructions which recalculate addresses already // calculated by some LEA and replace their memory operands with its def // register. -bool X86OptimizeLEAPass::removeRedundantAddrCalc(MemOpMap &LEAs) { +bool X86OptimizeLEAsImpl::removeRedundantAddrCalc(MemOpMap &LEAs) { bool Changed = false; assert(!LEAs.empty()); @@ -570,10 +578,10 @@ bool X86OptimizeLEAPass::removeRedundantAddrCalc(MemOpMap &LEAs) { return Changed; } -MachineInstr *X86OptimizeLEAPass::replaceDebugValue(MachineInstr &MI, - Register OldReg, - Register NewReg, - int64_t AddrDispShift) { +MachineInstr *X86OptimizeLEAsImpl::replaceDebugValue(MachineInstr &MI, + Register OldReg, + Register NewReg, + int64_t AddrDispShift) { const DIExpression *Expr = MI.getDebugExpression(); if (AddrDispShift != 0) { if (MI.isNonListDebugValue()) { @@ -618,7 +626,7 @@ MachineInstr *X86OptimizeLEAPass::replaceDebugValue(MachineInstr &MI, } // Try to find similar LEAs in the list and replace one with another. -bool X86OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) { +bool X86OptimizeLEAsImpl::removeRedundantLEAs(MemOpMap &LEAs) { bool Changed = false; // Loop over all entries in the table. @@ -708,20 +716,17 @@ bool X86OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) { return Changed; } -bool X86OptimizeLEAPass::runOnMachineFunction(MachineFunction &MF) { +bool X86OptimizeLEAsImpl::runOnMachineFunction( + MachineFunction &MF, ProfileSummaryInfo *PSI, + MachineBlockFrequencyInfo *MBFI) { bool Changed = false; - if (DisableX86LEAOpt || skipFunction(MF.getFunction())) + if (DisableX86LEAOpt) return false; MRI = &MF.getRegInfo(); TII = MF.getSubtarget<X86Subtarget>().getInstrInfo(); TRI = MF.getSubtarget<X86Subtarget>().getRegisterInfo(); - auto *PSI = - &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI(); - auto *MBFI = (PSI && PSI->hasProfileSummary()) ? - &getAnalysis<LazyMachineBlockFrequencyInfoPass>().getBFI() : - nullptr; // Process all basic blocks. for (auto &MBB : MF) { @@ -746,3 +751,34 @@ bool X86OptimizeLEAPass::runOnMachineFunction(MachineFunction &MF) { return Changed; } + +bool X86OptimizeLEAsLegacy::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(MF.getFunction())) + return false; + ProfileSummaryInfo *PSI = + &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI(); + MachineBlockFrequencyInfo *MBFI = + (PSI && PSI->hasProfileSummary()) + ? &getAnalysis<LazyMachineBlockFrequencyInfoPass>().getBFI() + : nullptr; + X86OptimizeLEAsImpl PassImpl; + return PassImpl.runOnMachineFunction(MF, PSI, MBFI); +} + +PreservedAnalyses +X86OptimizeLEAsPass::run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM) { + ProfileSummaryInfo *PSI = + MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(MF) + .getCachedResult<ProfileSummaryAnalysis>( + *MF.getFunction().getParent()); + MachineBlockFrequencyInfo *MBFI = + (PSI && PSI->hasProfileSummary()) + ? &MFAM.getResult<MachineBlockFrequencyAnalysis>(MF) + : nullptr; + X86OptimizeLEAsImpl PassImpl; + bool Changed = PassImpl.runOnMachineFunction(MF, PSI, MBFI); + if (!Changed) + return PreservedAnalyses::all(); + return getMachineFunctionPassPreservedAnalyses().preserveSet<CFGAnalyses>(); +} diff --git a/llvm/lib/Target/X86/X86PassRegistry.def b/llvm/lib/Target/X86/X86PassRegistry.def index 904be8df24813..e06a805219120 100644 --- a/llvm/lib/Target/X86/X86PassRegistry.def +++ b/llvm/lib/Target/X86/X86PassRegistry.def @@ -35,6 +35,7 @@ MACHINE_FUNCTION_PASS("x86-expand-pseudo", X86ExpandPseudoPass()) MACHINE_FUNCTION_PASS("x86-fixup-leas", X86FixupLEAsPass()) MACHINE_FUNCTION_PASS("x86-flags-copy-lowering", X86FlagsCopyLoweringPass()) MACHINE_FUNCTION_PASS("x86-fp-stackifier", X86FPStackifierPass()) +MACHINE_FUNCTION_PASS("x86-optimize-leas", X86OptimizeLEAsPass()) MACHINE_FUNCTION_PASS("x86-isel", X86ISelDAGToDAGPass(*this)) #undef MACHINE_FUNCTION_PASS @@ -56,7 +57,6 @@ DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-vector-constants", X86FixupVectorConstant DUMMY_MACHINE_FUNCTION_PASS("x86-lower-tile-copy", X86LowerTileCopy()) DUMMY_MACHINE_FUNCTION_PASS("x86-lvi-load", X86LoadValueInjectionLoadHardeningPass()) DUMMY_MACHINE_FUNCTION_PASS("x86-lvi-ret", X86LoadValueInjectionRetHardeningPass()) -DUMMY_MACHINE_FUNCTION_PASS("x86-optimize-LEAs", X86OptimizeLEAPass()) DUMMY_MACHINE_FUNCTION_PASS("x86-return-thunks", X86ReturnThunks()) DUMMY_MACHINE_FUNCTION_PASS("x86-seses", X86SpeculativeExecutionSideEffectSuppression()) DUMMY_MACHINE_FUNCTION_PASS("x86-slh", X86SpeculativeLoadHardeningPass()) diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index a9966668dca5f..425a321c40156 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -95,7 +95,7 @@ extern "C" LLVM_C_ABI void LLVMInitializeX86Target() { initializeX86FlagsCopyLoweringLegacyPass(PR); initializeX86LoadValueInjectionLoadHardeningPassPass(PR); initializeX86LoadValueInjectionRetHardeningPassPass(PR); - initializeX86OptimizeLEAPassPass(PR); + initializeX86OptimizeLEAsLegacyPass(PR); initializeX86PartialReductionLegacyPass(PR); initializePseudoProbeInserterPass(PR); initializeX86ReturnThunksPass(PR); @@ -507,7 +507,7 @@ void X86PassConfig::addPreRegAlloc() { if (getOptLevel() != CodeGenOptLevel::None) { addPass(&LiveRangeShrinkID); addPass(createX86FixupSetCC()); - addPass(createX86OptimizeLEAs()); + addPass(createX86OptimizeLEAsLegacyPass()); addPass(createX86CallFrameOptimization()); addPass(createX86AvoidStoreForwardingBlocks()); } diff --git a/llvm/test/CodeGen/X86/pr57673.ll b/llvm/test/CodeGen/X86/pr57673.ll index c3710a7fc462c..24862539ca637 100644 --- a/llvm/test/CodeGen/X86/pr57673.ll +++ b/llvm/test/CodeGen/X86/pr57673.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 -; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after=x86-optimize-LEAs -experimental-debug-variable-locations=false < %s \ +; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after=x86-optimize-leas -experimental-debug-variable-locations=false < %s \ ; RUN: | FileCheck %s --check-prefix=NORMAL -; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after=x86-optimize-LEAs -experimental-debug-variable-locations < %s \ +; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after=x86-optimize-leas -experimental-debug-variable-locations < %s \ ; RUN: | FileCheck %s --check-prefix=INSTRREF ; The LEA optimization pass used to crash on this testcase. diff --git a/llvm/test/CodeGen/X86/pr57673.mir b/llvm/test/CodeGen/X86/pr57673.mir index c7557da28c85f..c183affb9c039 100644 --- a/llvm/test/CodeGen/X86/pr57673.mir +++ b/llvm/test/CodeGen/X86/pr57673.mir @@ -1,4 +1,5 @@ -# RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -run-pass=x86-optimize-LEAs -o - %s | FileCheck %s +# RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -run-pass=x86-optimize-leas -o - %s | FileCheck %s +# RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -passes=x86-optimize-leas -o - %s | FileCheck %s # This test case used to trigger the assertion in the LEA optimization pass: # `````````` </details> https://github.com/llvm/llvm-project/pull/173760 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
