================
@@ -5743,28 +5751,69 @@ static MachineBasicBlock *lowerWaveReduce(MachineInstr
&MI,
break;
}
case AMDGPU::V_ADD_F32_e64:
- case AMDGPU::V_SUB_F32_e64: {
- Register ActiveLanesVreg =
- MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
- Register DstVreg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
+ case AMDGPU::V_ADD_F64_e64:
+ case AMDGPU::V_SUB_F32_e64:
+ case AMDGPU::WAVE_REDUCE_FSUB_PSEUDO_F64: {
----------------
arsenm wrote:
Should not have this pseudo, just directly emit add + fneg
https://github.com/llvm/llvm-project/pull/170812
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