https://github.com/snehasish updated https://github.com/llvm/llvm-project/pull/177707
>From f39d5f825e34796c39db462cb79598921e45bf4e Mon Sep 17 00:00:00 2001 From: Snehasish Kumar <[email protected]> Date: Sat, 24 Jan 2026 00:06:53 +0000 Subject: [PATCH] [InstCombine] Preserve !prof metadata when creating select instructions. --- .../InstCombine/InstructionCombining.cpp | 4 +++- llvm/test/Transforms/InstCombine/binop-select.ll | 15 ++++++++++----- 2 files changed, 13 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp index d0f3450f9878f..33243b9df8ea2 100644 --- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp @@ -1916,7 +1916,9 @@ Instruction *InstCombinerImpl::foldBinOpSelectBinOp(BinaryOperator &Op) { if (!NewTV || !NewFV) return nullptr; - Value *NewSI = Builder.CreateSelect(SI->getCondition(), NewTV, NewFV); + Value *NewSI = + Builder.CreateSelect(SI->getCondition(), NewTV, NewFV, "", + ProfcheckDisableMetadataFixes ? nullptr : SI); return BinaryOperator::Create(Op.getOpcode(), NewSI, Input); } diff --git a/llvm/test/Transforms/InstCombine/binop-select.ll b/llvm/test/Transforms/InstCombine/binop-select.ll index b14e4dbd0702e..2393a3be3b5f9 100644 --- a/llvm/test/Transforms/InstCombine/binop-select.ll +++ b/llvm/test/Transforms/InstCombine/binop-select.ll @@ -1,4 +1,4 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals smart ; RUN: opt < %s -passes=instcombine -S | FileCheck %s declare void @use(i32) @@ -959,13 +959,13 @@ define i8 @xorSelectxorSame(i8 %arg0, i8 %arg1) { define i8 @addSelectaddNoCommonBits1(i8 %arg0, i8 %arg1) { ; CHECK-LABEL: @addSelectaddNoCommonBits1( ; CHECK-NEXT: [[V0:%.*]] = icmp eq i8 [[ARG1:%.*]], -1 -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[V0]], i8 5, i8 1 +; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[V0]], i8 5, i8 1, !prof [[PROF0:![0-9]+]] ; CHECK-NEXT: [[V3:%.*]] = add i8 [[TMP1]], [[ARG0:%.*]] ; CHECK-NEXT: ret i8 [[V3]] ; %v0 = icmp eq i8 %arg1, -1 %v1 = add i8 %arg0, 4 - %v2 = select i1 %v0, i8 %v1, i8 %arg0 + %v2 = select i1 %v0, i8 %v1, i8 %arg0, !prof !0 %v3 = add i8 %v2, 1 ret i8 %v3 } @@ -1044,17 +1044,19 @@ define i8 @addSelectaddSomeCommon2(i8 %arg0, i8 %arg1) { define i8 @addSelectaddSame(i8 %arg0, i8 %arg1) { ; CHECK-LABEL: @addSelectaddSame( ; CHECK-NEXT: [[V0:%.*]] = icmp eq i8 [[ARG1:%.*]], -1 -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[V0]], i8 84, i8 42 +; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[V0]], i8 84, i8 42, !prof [[PROF0]] ; CHECK-NEXT: [[V3:%.*]] = add i8 [[TMP1]], [[ARG0:%.*]] ; CHECK-NEXT: ret i8 [[V3]] ; %v0 = icmp eq i8 %arg1, -1 %v1 = add i8 %arg0, 42 - %v2 = select i1 %v0, i8 %v1, i8 %arg0 + %v2 = select i1 %v0, i8 %v1, i8 %arg0, !prof !0 %v3 = add i8 %v2, 42 ret i8 %v3 } +!0 = !{!"branch_weights", i32 10, i32 90} + ; sub tests define i8 @subSelectsubNoCommonBitsConstOnLeft1(i8 %arg0, i8 %arg1) { ; CHECK-LABEL: @subSelectsubNoCommonBitsConstOnLeft1( @@ -1347,3 +1349,6 @@ define <4 x i8> @orSelectOrVectors(<4 x i8> %arg0, i8 %arg1) { ret <4 x i8> %v3 } +;. +; CHECK: [[PROF0]] = !{!"branch_weights", i32 10, i32 90} +;. _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
