https://github.com/jthackray created https://github.com/llvm/llvm-project/pull/178913
Change the gating of `tlbip` instructions containing `*E1IS*`, `*E1OS*`, `*E2IS*` or `*E2OS*` to be used with `+tlbid` or `+d128`. This is because the 2025 Armv9.7-A MemSys specification says: ``` All TLBIP *E1IS*, TLBIP*E1OS*, TLBIP*E2IS* and TLBIP*E2OS* instructions that are currently dependent on FEAT_D128 are updated to be dependent on FEAT_D128 or FEAT_TLBID ``` >From c475b7882f78bff39e4fd5157af79907b1fd0a89 Mon Sep 17 00:00:00 2001 From: Jonathan Thackray <[email protected]> Date: Fri, 30 Jan 2026 16:05:07 +0000 Subject: [PATCH] [AArch64][llvm] Gate some `tlbip` insns with +tlbid or +d128 Change the gating of `tlbip` instructions containing `*E1IS*`, `*E1OS*`, `*E2IS*` or `*E2OS*` to be used with `+tlbid` or `+d128`. This is because the 2025 Armv9.7-A MemSys specification says: ``` All TLBIP *E1IS*, TLBIP*E1OS*, TLBIP*E2IS* and TLBIP*E2OS* instructions that are currently dependent on FEAT_D128 are updated to be dependent on FEAT_D128 or FEAT_TLBID ``` --- .../Target/AArch64/AArch64SystemOperands.td | 13 +- .../AArch64/AsmParser/AArch64AsmParser.cpp | 20 +- .../Target/AArch64/Utils/AArch64BaseInfo.h | 20 ++ llvm/test/MC/AArch64/armv9a-sysp.s | 132 ++++----- llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s | 259 ++++++++++++++++++ 5 files changed, 370 insertions(+), 74 deletions(-) create mode 100644 llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td index 844af6e3a4eb7..86b2a2c37fcd3 100644 --- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td +++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td @@ -897,6 +897,15 @@ defm TLBIP : TLBITableBase; multiclass TLBI<string name, bit hasTLBIP, bits<3> op1, bits<4> crn, bits<4> crm, bits<3> op2, bit needsreg = 1, bit optionalreg = 0> { + defvar HasE1IS = !ne(!find(name, "E1IS"), -1); + defvar HasE1OS = !ne(!find(name, "E1OS"), -1); + defvar HasE2IS = !ne(!find(name, "E2IS"), -1); + defvar HasE2OS = !ne(!find(name, "E2OS"), -1); + defvar allowTLBID = !or(!or(HasE1IS, HasE1OS), !or(HasE2IS, HasE2OS)); + defvar TLBIPRequires = !if(allowTLBID, + ["AArch64::FeatureD128", "AArch64::FeatureTLBID"], + ["AArch64::FeatureD128"]); + defvar TLBIPRequiresNXS = !listconcat(TLBIPRequires, ["AArch64::FeatureXS"]); def : TLBIEntry<name, op1, crn, crm, op2, needsreg, optionalreg>; def : TLBIEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg, optionalreg> { let Encoding{7} = 1; @@ -904,11 +913,11 @@ multiclass TLBI<string name, bit hasTLBIP, bits<3> op1, bits<4> crn, bits<4> crm } if !eq(hasTLBIP, true) then { def : TLBIPEntry<name, op1, crn, crm, op2, needsreg, optionalreg> { - let ExtraRequires = ["AArch64::FeatureD128"]; + let ExtraRequires = TLBIPRequires; } def : TLBIPEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg, optionalreg> { let Encoding{7} = 1; - let ExtraRequires = ["AArch64::FeatureD128", "AArch64::FeatureXS"]; + let ExtraRequires = TLBIPRequiresNXS; } } } diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index 6dcd7f5ec4cc9..8367eb4d54acf 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -4269,8 +4269,6 @@ bool AArch64AsmParser::parseSyspAlias(StringRef Name, SMLoc NameLoc, const AArch64TLBIP::TLBIP *TLBIPorig = AArch64TLBIP::lookupTLBIPByName(Op); if (!TLBIPorig) return TokError("invalid operand for TLBIP instruction"); - if (!getSTI().getFeatureBits()[AArch64::FeatureD128]) - return TokError("instruction requires: d128"); const AArch64TLBIP::TLBIP TLBIP( TLBIPorig->Name, TLBIPorig->Encoding | (HasnXSQualifier ? (1 << 7) : 0), TLBIPorig->NeedsReg, TLBIPorig->OptionalReg, @@ -4278,10 +4276,20 @@ bool AArch64AsmParser::parseSyspAlias(StringRef Name, SMLoc NameLoc, ? TLBIPorig->FeaturesRequired | FeatureBitset({AArch64::FeatureXS}) : TLBIPorig->FeaturesRequired); if (!TLBIP.haveFeatures(getSTI().getFeatureBits())) { - std::string Name = - std::string(TLBIP.Name) + (HasnXSQualifier ? "nXS" : ""); - std::string Str("TLBIP " + Name + " requires: "); - setRequiredFeatureString(TLBIP.getRequiredFeatures(), Str); + FeatureBitset Active = getSTI().getFeatureBits(); + FeatureBitset Missing = TLBIP.getRequiredFeatures() & ~Active; + if (TLBIP.allowTLBID()) { + Missing.reset(AArch64::FeatureD128); + Missing.reset(AArch64::FeatureTLBID); + if (!Active[AArch64::FeatureD128] && !Active[AArch64::FeatureTLBID]) { + if (Missing.none()) + return TokError("instruction requires: tlbid or d128"); + Missing.set(AArch64::FeatureD128); + Missing.set(AArch64::FeatureTLBID); + } + } + std::string Str("instruction requires: "); + setRequiredFeatureString(Missing, Str); return TokError(Str); } createSysAlias(TLBIP.Encoding, Operands, S); diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h index 0c98fdc75cacd..1ea79b9decef0 100644 --- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h @@ -824,6 +824,26 @@ struct TLBI : SysAliasOptionalReg { namespace AArch64TLBIP { struct TLBIP : SysAliasOptionalReg { using SysAliasOptionalReg::SysAliasOptionalReg; + + bool allowTLBID() const { + return FeaturesRequired[llvm::AArch64::FeatureTLBID]; + } + + bool haveFeatures(FeatureBitset ActiveFeatures) const { + if (ActiveFeatures[llvm::AArch64::FeatureAll]) + return true; + + FeatureBitset Required = FeaturesRequired; + if (allowTLBID()) { + Required.reset(llvm::AArch64::FeatureD128); + Required.reset(llvm::AArch64::FeatureTLBID); + return (Required & ActiveFeatures) == Required && + (ActiveFeatures[llvm::AArch64::FeatureD128] || + ActiveFeatures[llvm::AArch64::FeatureTLBID]); + } + + return (Required & ActiveFeatures) == Required; + } }; #define GET_TLBIPTable_DECL #include "AArch64GenSystemOperands.inc" diff --git a/llvm/test/MC/AArch64/armv9a-sysp.s b/llvm/test/MC/AArch64/armv9a-sysp.s index afd3553d8b923..1d81698f32001 100644 --- a/llvm/test/MC/AArch64/armv9a-sysp.s +++ b/llvm/test/MC/AArch64/armv9a-sysp.s @@ -186,25 +186,25 @@ tlbip IPAS2E1NXS, x4, x5 tlbip IPAS2E1IS, x4, x5 // CHECK-INST: tlbip ipas2e1is, x4, x5 // CHECK-ENCODING: encoding: [0x24,0x80,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c8024 sysp #4, c8, c0, #1, x4, x5 tlbip IPAS2E1ISNXS, x4, x5 // CHECK-INST: tlbip ipas2e1isnxs, x4, x5 // CHECK-ENCODING: encoding: [0x24,0x90,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c9024 sysp #4, c9, c0, #1, x4, x5 tlbip IPAS2E1OS, x4, x5 // CHECK-INST: tlbip ipas2e1os, x4, x5 // CHECK-ENCODING: encoding: [0x04,0x84,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c8404 sysp #4, c8, c4, #0, x4, x5 tlbip IPAS2E1OSNXS, x4, x5 // CHECK-INST: tlbip ipas2e1osnxs, x4, x5 // CHECK-ENCODING: encoding: [0x04,0x94,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c9404 sysp #4, c9, c4, #0, x4, x5 tlbip IPAS2LE1, x4, x5 @@ -222,25 +222,25 @@ tlbip IPAS2LE1NXS, x4, x5 tlbip IPAS2LE1IS, x4, x5 // CHECK-INST: tlbip ipas2le1is, x4, x5 // CHECK-ENCODING: encoding: [0xa4,0x80,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c80a4 sysp #4, c8, c0, #5, x4, x5 tlbip IPAS2LE1ISNXS, x4, x5 // CHECK-INST: tlbip ipas2le1isnxs, x4, x5 // CHECK-ENCODING: encoding: [0xa4,0x90,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c90a4 sysp #4, c9, c0, #5, x4, x5 tlbip IPAS2LE1OS, x4, x5 // CHECK-INST: tlbip ipas2le1os, x4, x5 // CHECK-ENCODING: encoding: [0x84,0x84,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c8484 sysp #4, c8, c4, #4, x4, x5 tlbip IPAS2LE1OSNXS, x4, x5 // CHECK-INST: tlbip ipas2le1osnxs, x4, x5 // CHECK-ENCODING: encoding: [0x84,0x94,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c9484 sysp #4, c9, c4, #4, x4, x5 tlbip VAE1, x8, x9 @@ -258,25 +258,25 @@ tlbip VAE1NXS, x8, x9 tlbip VAE1IS, x8, x9 // CHECK-INST: tlbip vae1is, x8, x9 // CHECK-ENCODING: encoding: [0x28,0x83,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5488328 sysp #0, c8, c3, #1, x8, x9 tlbip VAE1ISNXS, x8, x9 // CHECK-INST: tlbip vae1isnxs, x8, x9 // CHECK-ENCODING: encoding: [0x28,0x93,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5489328 sysp #0, c9, c3, #1, x8, x9 tlbip VAE1OS, x8, x9 // CHECK-INST: tlbip vae1os, x8, x9 // CHECK-ENCODING: encoding: [0x28,0x81,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5488128 sysp #0, c8, c1, #1, x8, x9 tlbip VAE1OSNXS, x8, x9 // CHECK-INST: tlbip vae1osnxs, x8, x9 // CHECK-ENCODING: encoding: [0x28,0x91,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5489128 sysp #0, c9, c1, #1, x8, x9 tlbip VALE1, x8, x9 @@ -294,25 +294,25 @@ tlbip VALE1NXS, x8, x9 tlbip VALE1IS, x8, x9 // CHECK-INST: tlbip vale1is, x8, x9 // CHECK-ENCODING: encoding: [0xa8,0x83,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54883a8 sysp #0, c8, c3, #5, x8, x9 tlbip VALE1ISNXS, x8, x9 // CHECK-INST: tlbip vale1isnxs, x8, x9 // CHECK-ENCODING: encoding: [0xa8,0x93,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54893a8 sysp #0, c9, c3, #5, x8, x9 tlbip VALE1OS, x8, x9 // CHECK-INST: tlbip vale1os, x8, x9 // CHECK-ENCODING: encoding: [0xa8,0x81,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54881a8 sysp #0, c8, c1, #5, x8, x9 tlbip VALE1OSNXS, x8, x9 // CHECK-INST: tlbip vale1osnxs, x8, x9 // CHECK-ENCODING: encoding: [0xa8,0x91,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54891a8 sysp #0, c9, c1, #5, x8, x9 tlbip VAAE1, x8, x9 @@ -330,25 +330,25 @@ tlbip VAAE1NXS, x8, x9 tlbip VAAE1IS, x8, x9 // CHECK-INST: tlbip vaae1is, x8, x9 // CHECK-ENCODING: encoding: [0x68,0x83,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5488368 sysp #0, c8, c3, #3, x8, x9 tlbip VAAE1ISNXS, x8, x9 // CHECK-INST: tlbip vaae1isnxs, x8, x9 // CHECK-ENCODING: encoding: [0x68,0x93,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5489368 sysp #0, c9, c3, #3, x8, x9 tlbip VAAE1OS, x8, x9 // CHECK-INST: tlbip vaae1os, x8, x9 // CHECK-ENCODING: encoding: [0x68,0x81,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5488168 sysp #0, c8, c1, #3, x8, x9 tlbip VAAE1OSNXS, x8, x9 // CHECK-INST: tlbip vaae1osnxs, x8, x9 // CHECK-ENCODING: encoding: [0x68,0x91,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5489168 sysp #0, c9, c1, #3, x8, x9 tlbip VAALE1, x8, x9 @@ -366,25 +366,25 @@ tlbip VAALE1NXS, x8, x9 tlbip VAALE1IS, x8, x9 // CHECK-INST: tlbip vaale1is, x8, x9 // CHECK-ENCODING: encoding: [0xe8,0x83,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54883e8 sysp #0, c8, c3, #7, x8, x9 tlbip VAALE1ISNXS, x8, x9 // CHECK-INST: tlbip vaale1isnxs, x8, x9 // CHECK-ENCODING: encoding: [0xe8,0x93,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54893e8 sysp #0, c9, c3, #7, x8, x9 tlbip VAALE1OS, x8, x9 // CHECK-INST: tlbip vaale1os, x8, x9 // CHECK-ENCODING: encoding: [0xe8,0x81,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54881e8 sysp #0, c8, c1, #7, x8, x9 tlbip VAALE1OSNXS, x8, x9 // CHECK-INST: tlbip vaale1osnxs, x8, x9 // CHECK-ENCODING: encoding: [0xe8,0x91,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54891e8 sysp #0, c9, c1, #7, x8, x9 tlbip VAE2, x14, x15 @@ -402,25 +402,25 @@ tlbip VAE2NXS, x14, x15 tlbip VAE2IS, x14, x15 // CHECK-INST: tlbip vae2is, x14, x15 // CHECK-ENCODING: encoding: [0x2e,0x83,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c832e sysp #4, c8, c3, #1, x14, x15 tlbip VAE2ISNXS, x14, x15 // CHECK-INST: tlbip vae2isnxs, x14, x15 // CHECK-ENCODING: encoding: [0x2e,0x93,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c932e sysp #4, c9, c3, #1, x14, x15 tlbip VAE2OS, x14, x15 // CHECK-INST: tlbip vae2os, x14, x15 // CHECK-ENCODING: encoding: [0x2e,0x81,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c812e sysp #4, c8, c1, #1, x14, x15 tlbip VAE2OSNXS, x14, x15 // CHECK-INST: tlbip vae2osnxs, x14, x15 // CHECK-ENCODING: encoding: [0x2e,0x91,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c912e sysp #4, c9, c1, #1, x14, x15 tlbip VALE2, x14, x15 @@ -438,25 +438,25 @@ tlbip VALE2NXS, x14, x15 tlbip VALE2IS, x14, x15 // CHECK-INST: tlbip vale2is, x14, x15 // CHECK-ENCODING: encoding: [0xae,0x83,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c83ae sysp #4, c8, c3, #5, x14, x15 tlbip VALE2ISNXS, x14, x15 // CHECK-INST: tlbip vale2isnxs, x14, x15 // CHECK-ENCODING: encoding: [0xae,0x93,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c93ae sysp #4, c9, c3, #5, x14, x15 tlbip VALE2OS, x14, x15 // CHECK-INST: tlbip vale2os, x14, x15 // CHECK-ENCODING: encoding: [0xae,0x81,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c81ae sysp #4, c8, c1, #5, x14, x15 tlbip VALE2OSNXS, x14, x15 // CHECK-INST: tlbip vale2osnxs, x14, x15 // CHECK-ENCODING: encoding: [0xae,0x91,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c91ae sysp #4, c9, c1, #5, x14, x15 tlbip VAE3, x24, x25 @@ -546,25 +546,25 @@ tlbip RVAE1NXS, x18, x19 tlbip RVAE1IS, x18, x19 // CHECK-INST: tlbip rvae1is, x18, x19 // CHECK-ENCODING: encoding: [0x32,0x82,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5488232 sysp #0, c8, c2, #1, x18, x19 tlbip RVAE1ISNXS, x18, x19 // CHECK-INST: tlbip rvae1isnxs, x18, x19 // CHECK-ENCODING: encoding: [0x32,0x92,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5489232 sysp #0, c9, c2, #1, x18, x19 tlbip RVAE1OS, x18, x19 // CHECK-INST: tlbip rvae1os, x18, x19 // CHECK-ENCODING: encoding: [0x32,0x85,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5488532 sysp #0, c8, c5, #1, x18, x19 tlbip RVAE1OSNXS, x18, x19 // CHECK-INST: tlbip rvae1osnxs, x18, x19 // CHECK-ENCODING: encoding: [0x32,0x95,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5489532 sysp #0, c9, c5, #1, x18, x19 tlbip RVAAE1, x18, x19 @@ -582,25 +582,25 @@ tlbip RVAAE1NXS, x18, x19 tlbip RVAAE1IS, x18, x19 // CHECK-INST: tlbip rvaae1is, x18, x19 // CHECK-ENCODING: encoding: [0x72,0x82,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5488272 sysp #0, c8, c2, #3, x18, x19 tlbip RVAAE1ISNXS, x18, x19 // CHECK-INST: tlbip rvaae1isnxs, x18, x19 // CHECK-ENCODING: encoding: [0x72,0x92,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5489272 sysp #0, c9, c2, #3, x18, x19 tlbip RVAAE1OS, x18, x19 // CHECK-INST: tlbip rvaae1os, x18, x19 // CHECK-ENCODING: encoding: [0x72,0x85,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5488572 sysp #0, c8, c5, #3, x18, x19 tlbip RVAAE1OSNXS, x18, x19 // CHECK-INST: tlbip rvaae1osnxs, x18, x19 // CHECK-ENCODING: encoding: [0x72,0x95,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d5489572 sysp #0, c9, c5, #3, x18, x19 tlbip RVALE1, x18, x19 @@ -618,25 +618,25 @@ tlbip RVALE1NXS, x18, x19 tlbip RVALE1IS, x18, x19 // CHECK-INST: tlbip rvale1is, x18, x19 // CHECK-ENCODING: encoding: [0xb2,0x82,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54882b2 sysp #0, c8, c2, #5, x18, x19 tlbip RVALE1ISNXS, x18, x19 // CHECK-INST: tlbip rvale1isnxs, x18, x19 // CHECK-ENCODING: encoding: [0xb2,0x92,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54892b2 sysp #0, c9, c2, #5, x18, x19 tlbip RVALE1OS, x18, x19 // CHECK-INST: tlbip rvale1os, x18, x19 // CHECK-ENCODING: encoding: [0xb2,0x85,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54885b2 sysp #0, c8, c5, #5, x18, x19 tlbip RVALE1OSNXS, x18, x19 // CHECK-INST: tlbip rvale1osnxs, x18, x19 // CHECK-ENCODING: encoding: [0xb2,0x95,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54895b2 sysp #0, c9, c5, #5, x18, x19 tlbip RVAALE1, x18, x19 @@ -654,25 +654,25 @@ tlbip RVAALE1NXS, x18, x19 tlbip RVAALE1IS, x18, x19 // CHECK-INST: tlbip rvaale1is, x18, x19 // CHECK-ENCODING: encoding: [0xf2,0x82,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54882f2 sysp #0, c8, c2, #7, x18, x19 tlbip RVAALE1ISNXS, x18, x19 // CHECK-INST: tlbip rvaale1isnxs, x18, x19 // CHECK-ENCODING: encoding: [0xf2,0x92,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54892f2 sysp #0, c9, c2, #7, x18, x19 tlbip RVAALE1OS, x18, x19 // CHECK-INST: tlbip rvaale1os, x18, x19 // CHECK-ENCODING: encoding: [0xf2,0x85,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54885f2 sysp #0, c8, c5, #7, x18, x19 tlbip RVAALE1OSNXS, x18, x19 // CHECK-INST: tlbip rvaale1osnxs, x18, x19 // CHECK-ENCODING: encoding: [0xf2,0x95,0x48,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54895f2 sysp #0, c9, c5, #7, x18, x19 tlbip RVAE2, x28, x29 @@ -690,25 +690,25 @@ tlbip RVAE2NXS, x28, x29 tlbip RVAE2IS, x28, x29 // CHECK-INST: tlbip rvae2is, x28, x29 // CHECK-ENCODING: encoding: [0x3c,0x82,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c823c sysp #4, c8, c2, #1, x28, x29 tlbip RVAE2ISNXS, x28, x29 // CHECK-INST: tlbip rvae2isnxs, x28, x29 // CHECK-ENCODING: encoding: [0x3c,0x92,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c923c sysp #4, c9, c2, #1, x28, x29 tlbip RVAE2OS, x28, x29 // CHECK-INST: tlbip rvae2os, x28, x29 // CHECK-ENCODING: encoding: [0x3c,0x85,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c853c sysp #4, c8, c5, #1, x28, x29 tlbip RVAE2OSNXS, x28, x29 // CHECK-INST: tlbip rvae2osnxs, x28, x29 // CHECK-ENCODING: encoding: [0x3c,0x95,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c953c sysp #4, c9, c5, #1, x28, x29 tlbip RVALE2, x28, x29 @@ -726,25 +726,25 @@ tlbip RVALE2NXS, x28, x29 tlbip RVALE2IS, x28, x29 // CHECK-INST: tlbip rvale2is, x28, x29 // CHECK-ENCODING: encoding: [0xbc,0x82,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c82bc sysp #4, c8, c2, #5, x28, x29 tlbip RVALE2ISNXS, x28, x29 // CHECK-INST: tlbip rvale2isnxs, x28, x29 // CHECK-ENCODING: encoding: [0xbc,0x92,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c92bc sysp #4, c9, c2, #5, x28, x29 tlbip RVALE2OS, x28, x29 // CHECK-INST: tlbip rvale2os, x28, x29 // CHECK-ENCODING: encoding: [0xbc,0x85,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c85bc sysp #4, c8, c5, #5, x28, x29 tlbip RVALE2OSNXS, x28, x29 // CHECK-INST: tlbip rvale2osnxs, x28, x29 // CHECK-ENCODING: encoding: [0xbc,0x95,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c95bc sysp #4, c9, c5, #5, x28, x29 tlbip RVAE3, x10, x11 @@ -834,25 +834,25 @@ tlbip RIPAS2E1NXS, x20, x21 tlbip RIPAS2E1IS, x20, x21 // CHECK-INST: tlbip ripas2e1is, x20, x21 // CHECK-ENCODING: encoding: [0x54,0x80,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c8054 sysp #4, c8, c0, #2, x20, x21 tlbip RIPAS2E1ISNXS, x20, x21 // CHECK-INST: tlbip ripas2e1isnxs, x20, x21 // CHECK-ENCODING: encoding: [0x54,0x90,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c9054 sysp #4, c9, c0, #2, x20, x21 tlbip RIPAS2E1OS, x20, x21 // CHECK-INST: tlbip ripas2e1os, x20, x21 // CHECK-ENCODING: encoding: [0x74,0x84,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c8474 sysp #4, c8, c4, #3, x20, x21 tlbip RIPAS2E1OSNXS, x20, x21 // CHECK-INST: tlbip ripas2e1osnxs, x20, x21 // CHECK-ENCODING: encoding: [0x74,0x94,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c9474 sysp #4, c9, c4, #3, x20, x21 tlbip RIPAS2LE1, x20, x21 @@ -870,35 +870,35 @@ tlbip RIPAS2LE1NXS, x20, x21 tlbip RIPAS2LE1IS, x20, x21 // CHECK-INST: tlbip ripas2le1is, x20, x21 // CHECK-ENCODING: encoding: [0xd4,0x80,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c80d4 sysp #4, c8, c0, #6, x20, x21 tlbip RIPAS2LE1ISNXS, x20, x21 // CHECK-INST: tlbip ripas2le1isnxs, x20, x21 // CHECK-ENCODING: encoding: [0xd4,0x90,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c90d4 sysp #4, c9, c0, #6, x20, x21 tlbip RIPAS2LE1OS, x20, x21 // CHECK-INST: tlbip ripas2le1os, x20, x21 // CHECK-ENCODING: encoding: [0xf4,0x84,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c84f4 sysp #4, c8, c4, #7, x20, x21 tlbip RIPAS2LE1OSNXS, x20, x21 // CHECK-INST: tlbip ripas2le1osnxs, x20, x21 // CHECK-ENCODING: encoding: [0xf4,0x94,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c94f4 sysp #4, c9, c4, #7, x20, x21 tlbip RIPAS2LE1OS, xzr, xzr // CHECK-INST: tlbip ripas2le1os, xzr, xzr // CHECK-ENCODING: encoding: [0xff,0x84,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c84ff sysp #4, c8, c4, #7 tlbip RIPAS2LE1OSNXS, xzr, xzr // CHECK-INST: tlbip ripas2le1osnxs, xzr, xzr // CHECK-ENCODING: encoding: [0xff,0x94,0x4c,0xd5] -// CHECK-ERROR: error: instruction requires: d128 +// CHECK-ERROR: error: instruction requires: tlbid or d128 // CHECK-UNKNOWN: d54c94ff sysp #4, c9, c4, #7 diff --git a/llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s b/llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s new file mode 100644 index 0000000000000..0361fbcc73d4b --- /dev/null +++ b/llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s @@ -0,0 +1,259 @@ +// NOTE: These TLBIP forms are valid with either +tlbid or +d128. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+tlbid,+tlb-rmi,+xs < %s | FileCheck %s --check-prefix=TLBID +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+d128,+tlb-rmi,+xs < %s | FileCheck %s --check-prefix=D128 + +tlbip VAE1OS, x0, x1 +// TLBID: tlbip vae1os, x0, x1 +// D128: tlbip vae1os, x0, x1 + +tlbip VAAE1OS, x0, x1 +// TLBID: tlbip vaae1os, x0, x1 +// D128: tlbip vaae1os, x0, x1 + +tlbip VALE1OS, x0, x1 +// TLBID: tlbip vale1os, x0, x1 +// D128: tlbip vale1os, x0, x1 + +tlbip VAALE1OS, x0, x1 +// TLBID: tlbip vaale1os, x0, x1 +// D128: tlbip vaale1os, x0, x1 + +tlbip RVAE1IS, x0, x1 +// TLBID: tlbip rvae1is, x0, x1 +// D128: tlbip rvae1is, x0, x1 + +tlbip RVAAE1IS, x0, x1 +// TLBID: tlbip rvaae1is, x0, x1 +// D128: tlbip rvaae1is, x0, x1 + +tlbip RVALE1IS, x0, x1 +// TLBID: tlbip rvale1is, x0, x1 +// D128: tlbip rvale1is, x0, x1 + +tlbip RVAALE1IS, x0, x1 +// TLBID: tlbip rvaale1is, x0, x1 +// D128: tlbip rvaale1is, x0, x1 + +tlbip VAE1IS, x0, x1 +// TLBID: tlbip vae1is, x0, x1 +// D128: tlbip vae1is, x0, x1 + +tlbip VAAE1IS, x0, x1 +// TLBID: tlbip vaae1is, x0, x1 +// D128: tlbip vaae1is, x0, x1 + +tlbip VALE1IS, x0, x1 +// TLBID: tlbip vale1is, x0, x1 +// D128: tlbip vale1is, x0, x1 + +tlbip VAALE1IS, x0, x1 +// TLBID: tlbip vaale1is, x0, x1 +// D128: tlbip vaale1is, x0, x1 + +tlbip RVAE1OS, x0, x1 +// TLBID: tlbip rvae1os, x0, x1 +// D128: tlbip rvae1os, x0, x1 + +tlbip RVAAE1OS, x0, x1 +// TLBID: tlbip rvaae1os, x0, x1 +// D128: tlbip rvaae1os, x0, x1 + +tlbip RVALE1OS, x0, x1 +// TLBID: tlbip rvale1os, x0, x1 +// D128: tlbip rvale1os, x0, x1 + +tlbip RVAALE1OS, x0, x1 +// TLBID: tlbip rvaale1os, x0, x1 +// D128: tlbip rvaale1os, x0, x1 + +tlbip VAE1OSNXS, x0, x1 +// TLBID: tlbip vae1osnxs, x0, x1 +// D128: tlbip vae1osnxs, x0, x1 + +tlbip VAAE1OSNXS, x0, x1 +// TLBID: tlbip vaae1osnxs, x0, x1 +// D128: tlbip vaae1osnxs, x0, x1 + +tlbip VALE1OSNXS, x0, x1 +// TLBID: tlbip vale1osnxs, x0, x1 +// D128: tlbip vale1osnxs, x0, x1 + +tlbip VAALE1OSNXS, x0, x1 +// TLBID: tlbip vaale1osnxs, x0, x1 +// D128: tlbip vaale1osnxs, x0, x1 + +tlbip RVAE1ISNXS, x0, x1 +// TLBID: tlbip rvae1isnxs, x0, x1 +// D128: tlbip rvae1isnxs, x0, x1 + +tlbip RVAAE1ISNXS, x0, x1 +// TLBID: tlbip rvaae1isnxs, x0, x1 +// D128: tlbip rvaae1isnxs, x0, x1 + +tlbip RVALE1ISNXS, x0, x1 +// TLBID: tlbip rvale1isnxs, x0, x1 +// D128: tlbip rvale1isnxs, x0, x1 + +tlbip RVAALE1ISNXS, x0, x1 +// TLBID: tlbip rvaale1isnxs, x0, x1 +// D128: tlbip rvaale1isnxs, x0, x1 + +tlbip VAE1ISNXS, x0, x1 +// TLBID: tlbip vae1isnxs, x0, x1 +// D128: tlbip vae1isnxs, x0, x1 + +tlbip VAAE1ISNXS, x0, x1 +// TLBID: tlbip vaae1isnxs, x0, x1 +// D128: tlbip vaae1isnxs, x0, x1 + +tlbip VALE1ISNXS, x0, x1 +// TLBID: tlbip vale1isnxs, x0, x1 +// D128: tlbip vale1isnxs, x0, x1 + +tlbip VAALE1ISNXS, x0, x1 +// TLBID: tlbip vaale1isnxs, x0, x1 +// D128: tlbip vaale1isnxs, x0, x1 + +tlbip RVAE1OSNXS, x0, x1 +// TLBID: tlbip rvae1osnxs, x0, x1 +// D128: tlbip rvae1osnxs, x0, x1 + +tlbip RVAAE1OSNXS, x0, x1 +// TLBID: tlbip rvaae1osnxs, x0, x1 +// D128: tlbip rvaae1osnxs, x0, x1 + +tlbip RVALE1OSNXS, x0, x1 +// TLBID: tlbip rvale1osnxs, x0, x1 +// D128: tlbip rvale1osnxs, x0, x1 + +tlbip RVAALE1OSNXS, x0, x1 +// TLBID: tlbip rvaale1osnxs, x0, x1 +// D128: tlbip rvaale1osnxs, x0, x1 + +tlbip IPAS2E1IS, x0, x1 +// TLBID: tlbip ipas2e1is, x0, x1 +// D128: tlbip ipas2e1is, x0, x1 + +tlbip RIPAS2E1IS, x0, x1 +// TLBID: tlbip ripas2e1is, x0, x1 +// D128: tlbip ripas2e1is, x0, x1 + +tlbip IPAS2LE1IS, x0, x1 +// TLBID: tlbip ipas2le1is, x0, x1 +// D128: tlbip ipas2le1is, x0, x1 + +tlbip RIPAS2LE1IS, x0, x1 +// TLBID: tlbip ripas2le1is, x0, x1 +// D128: tlbip ripas2le1is, x0, x1 + +tlbip VAE2OS, x0, x1 +// TLBID: tlbip vae2os, x0, x1 +// D128: tlbip vae2os, x0, x1 + +tlbip VALE2OS, x0, x1 +// TLBID: tlbip vale2os, x0, x1 +// D128: tlbip vale2os, x0, x1 + +tlbip RVAE2IS, x0, x1 +// TLBID: tlbip rvae2is, x0, x1 +// D128: tlbip rvae2is, x0, x1 + +tlbip RVALE2IS, x0, x1 +// TLBID: tlbip rvale2is, x0, x1 +// D128: tlbip rvale2is, x0, x1 + +tlbip VAE2IS, x0, x1 +// TLBID: tlbip vae2is, x0, x1 +// D128: tlbip vae2is, x0, x1 + +tlbip VALE2IS, x0, x1 +// TLBID: tlbip vale2is, x0, x1 +// D128: tlbip vale2is, x0, x1 + +tlbip IPAS2E1OS, x0, x1 +// TLBID: tlbip ipas2e1os, x0, x1 +// D128: tlbip ipas2e1os, x0, x1 + +tlbip RIPAS2E1OS, x0, x1 +// TLBID: tlbip ripas2e1os, x0, x1 +// D128: tlbip ripas2e1os, x0, x1 + +tlbip IPAS2LE1OS, x0, x1 +// TLBID: tlbip ipas2le1os, x0, x1 +// D128: tlbip ipas2le1os, x0, x1 + +tlbip RIPAS2LE1OS, x0, x1 +// TLBID: tlbip ripas2le1os, x0, x1 +// D128: tlbip ripas2le1os, x0, x1 + +tlbip RVAE2OS, x0, x1 +// TLBID: tlbip rvae2os, x0, x1 +// D128: tlbip rvae2os, x0, x1 + +tlbip RVALE2OS, x0, x1 +// TLBID: tlbip rvale2os, x0, x1 +// D128: tlbip rvale2os, x0, x1 + +tlbip IPAS2E1ISNXS, x0, x1 +// TLBID: tlbip ipas2e1isnxs, x0, x1 +// D128: tlbip ipas2e1isnxs, x0, x1 + +tlbip RIPAS2E1ISNXS, x0, x1 +// TLBID: tlbip ripas2e1isnxs, x0, x1 +// D128: tlbip ripas2e1isnxs, x0, x1 + +tlbip IPAS2LE1ISNXS, x0, x1 +// TLBID: tlbip ipas2le1isnxs, x0, x1 +// D128: tlbip ipas2le1isnxs, x0, x1 + +tlbip RIPAS2LE1ISNXS, x0, x1 +// TLBID: tlbip ripas2le1isnxs, x0, x1 +// D128: tlbip ripas2le1isnxs, x0, x1 + +tlbip VAE2OSNXS, x0, x1 +// TLBID: tlbip vae2osnxs, x0, x1 +// D128: tlbip vae2osnxs, x0, x1 + +tlbip VALE2OSNXS, x0, x1 +// TLBID: tlbip vale2osnxs, x0, x1 +// D128: tlbip vale2osnxs, x0, x1 + +tlbip RVAE2ISNXS, x0, x1 +// TLBID: tlbip rvae2isnxs, x0, x1 +// D128: tlbip rvae2isnxs, x0, x1 + +tlbip RVALE2ISNXS, x0, x1 +// TLBID: tlbip rvale2isnxs, x0, x1 +// D128: tlbip rvale2isnxs, x0, x1 + +tlbip VAE2ISNXS, x0, x1 +// TLBID: tlbip vae2isnxs, x0, x1 +// D128: tlbip vae2isnxs, x0, x1 + +tlbip VALE2ISNXS, x0, x1 +// TLBID: tlbip vale2isnxs, x0, x1 +// D128: tlbip vale2isnxs, x0, x1 + +tlbip IPAS2E1OSNXS, x0, x1 +// TLBID: tlbip ipas2e1osnxs, x0, x1 +// D128: tlbip ipas2e1osnxs, x0, x1 + +tlbip RIPAS2E1OSNXS, x0, x1 +// TLBID: tlbip ripas2e1osnxs, x0, x1 +// D128: tlbip ripas2e1osnxs, x0, x1 + +tlbip IPAS2LE1OSNXS, x0, x1 +// TLBID: tlbip ipas2le1osnxs, x0, x1 +// D128: tlbip ipas2le1osnxs, x0, x1 + +tlbip RIPAS2LE1OSNXS, x0, x1 +// TLBID: tlbip ripas2le1osnxs, x0, x1 +// D128: tlbip ripas2le1osnxs, x0, x1 + +tlbip RVAE2OSNXS, x0, x1 +// TLBID: tlbip rvae2osnxs, x0, x1 +// D128: tlbip rvae2osnxs, x0, x1 + +tlbip RVALE2OSNXS, x0, x1 +// TLBID: tlbip rvale2osnxs, x0, x1 +// D128: tlbip rvale2osnxs, x0, x1 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
