================ @@ -164,6 +172,28 @@ Changes to the PowerPC Backend ------------------------------ * `half` now uses a soft float ABI, which works correctly in more cases. +* Add ``mtpidr`` alias introduced in ISA3.0. +* Update `tlbie` instruction implementation for ISA3.0+. +* Update ``strlen``, ``strcpy`` and ``memcmp`` to use milicode calls instead of library calls. +* Prototyped intrinsic for xvrlw and load/store with right length left-justified. +* Prototyped Elliptic Curve Cryptography (ECC) Instructions. +* Prototyped VSX Vector Integer Arithmetic Instructions. +* Prototyped AES Acceleration Instructions. +* Prototyped vector uncompress instructions. +* Prototyped vector unpack instructions. +* Prototyped 32-byte indexed paired load and store instructions. +* Prototyped Context Switch instruction ``mtlpl``. +* Prototyped VSX rotate left word instruction. +* Prototyped paddis. +* Prototyped eTCE instructions. +* Prototyped Dense Math Facility and WACC COPY support. +* Implement the trampoline intrinsics and nest parameter for AIX. +* Introduced a minimum threshold for the largest number of comparisons needed to trigger bit test generation during switch lowering. +* Relax strictfp to constrain only ``libm`` calls, allowing non-FP optimizations. ---------------- RolandF77 wrote:
I think this needs to be re-worded to make it clear that the scope of the change is only libcalls. https://github.com/llvm/llvm-project/pull/180877 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
