================
@@ -1242,6 +1242,105 @@ def : Pat<(v4i32 (atomic_load_128_v4i32 addr:$src)),
def : Pat<(v4i32 (atomic_load_128_v4i32 addr:$src)),
(VMOVAPDZ128rm addr:$src)>, Requires<[HasAVX512]>;
+// store atomic <2 x i8>
+def : Pat<(atomic_store_16
----------------
arsenm wrote:
Are there existing non-store patterns for this? Can do a better job avoiding
duplication (i.e, there should be a PatFrag that covers atomic and non-atomic
cases)
https://github.com/llvm/llvm-project/pull/197619
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