================
@@ -420,14 +420,21 @@ bool
AMDGPURegBankCombinerImpl::combineD16Load(MachineInstr &MI) const {
if (mi_match(
Load, MRI,
- m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16))))) {
+ m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16)))) ||
+ mi_match(Load, MRI, m_GZExt(m_MInstr(SextLoad)))) {
----------------
petar-avramovic wrote:
```suggestion
m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16)))) ||
mi_match(Load, MRI,
m_GZExt(m_all_of(m_SpecificType(LLT::scalar(16)),
m_MInstr(SextLoad))))) {
```
https://github.com/llvm/llvm-project/pull/198671
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