Author: Marian Lukac Date: 2026-06-02T14:56:05Z New Revision: 7a82fb8299879df68c9c700949ade731a64e3325
URL: https://github.com/llvm/llvm-project/commit/7a82fb8299879df68c9c700949ade731a64e3325 DIFF: https://github.com/llvm/llvm-project/commit/7a82fb8299879df68c9c700949ade731a64e3325.diff LOG: Fix formatting Added: Modified: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp Removed: ################################################################################ diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index 3fad1ef357762..b619f525ae9a8 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -4270,8 +4270,8 @@ static int getIntOperandFromRegisterString(StringRef RegString) { // Need to combine the integer fields of the string into a single value // based on the bit encoding of MRS/MSR instruction. - return (Ops[0] << 14) | (Ops[1] << 11) | (Ops[2] << 7) | - (Ops[3] << 3) | (Ops[4]); + return (Ops[0] << 14) | (Ops[1] << 11) | (Ops[2] << 7) | (Ops[3] << 3) | + (Ops[4]); } // Lower the read_register intrinsic to an MRS instruction node if the special _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
