Author: Aiden Grossman Date: 2026-06-30T10:00:56-07:00 New Revision: 44efac15bbf786023afe35dd894fcf4e820291be
URL: https://github.com/llvm/llvm-project/commit/44efac15bbf786023afe35dd894fcf4e820291be DIFF: https://github.com/llvm/llvm-project/commit/44efac15bbf786023afe35dd894fcf4e820291be.diff LOG: Revert "[VPlan] Replace first-lane uses of BuildVector. (#206566)" This reverts commit f15288c2af25d0aca6516ca0b9a09d0ca90f5888. Added: Modified: llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp llvm/test/Transforms/LoopVectorize/VPlan/buildvector-first-lane-only.ll Removed: ################################################################################ diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp index 5834f38e96b84..ceb7c38ca3e29 100644 --- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp +++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp @@ -1736,14 +1736,6 @@ static void simplifyRecipe(VPSingleDefRecipe *Def) { return; } - // Replace uses of a BuildVector by users that only use its first lane with - // its first operand directly. - if (match(Def, m_BuildVector())) { - Def->replaceUsesWithIf(Def->getOperand(0), [Def](VPUser &U, unsigned) { - return U.usesFirstLaneOnly(Def); - }); - } - // Look through broadcast of single-scalar when used as select conditions; in // that case the scalar condition can be used directly. if (match(Def, diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/buildvector-first-lane-only.ll b/llvm/test/Transforms/LoopVectorize/VPlan/buildvector-first-lane-only.ll index 8361c2d3a59b2..54614ad7c2035 100644 --- a/llvm/test/Transforms/LoopVectorize/VPlan/buildvector-first-lane-only.ll +++ b/llvm/test/Transforms/LoopVectorize/VPlan/buildvector-first-lane-only.ll @@ -19,15 +19,19 @@ define i32 @last_active_lane_live_out(i32 %x) { ; CHECK-NEXT: Successor(s): middle.block ; CHECK-EMPTY: ; CHECK-NEXT: middle.block: -; CHECK-NEXT: EMIT vp<%active.lane.mask> = active lane mask ir<0>, ir<2>, ir<1> -; CHECK-NEXT: EMIT vp<[[VP5:%[0-9]+]]> = not vp<%active.lane.mask> -; CHECK-NEXT: EMIT vp<%first.inactive.lane> = first-active-lane vp<[[VP5]]> +; CHECK-NEXT: vp<[[VP5:%[0-9]+]]> = SCALAR-STEPS ir<0>, ir<1>, ir<4>, ir<1> +; CHECK-NEXT: vp<[[VP6:%[0-9]+]]> = SCALAR-STEPS ir<0>, ir<1>, ir<4>, ir<2> +; CHECK-NEXT: vp<[[VP7:%[0-9]+]]> = SCALAR-STEPS ir<0>, ir<1>, ir<4>, ir<3> +; CHECK-NEXT: EMIT vp<[[VP8:%[0-9]+]]> = buildvector ir<0>, vp<[[VP5]]>, vp<[[VP6]]>, vp<[[VP7]]> +; CHECK-NEXT: EMIT vp<%active.lane.mask> = active lane mask vp<[[VP8]]>, ir<2>, ir<1> +; CHECK-NEXT: EMIT vp<[[VP9:%[0-9]+]]> = not vp<%active.lane.mask> +; CHECK-NEXT: EMIT vp<%first.inactive.lane> = first-active-lane vp<[[VP9]]> ; CHECK-NEXT: EMIT vp<%last.active.lane> = sub vp<%first.inactive.lane>, ir<1> -; CHECK-NEXT: EMIT vp<[[VP6:%[0-9]+]]> = extractelement vp<[[VP4]]>, vp<%last.active.lane> +; CHECK-NEXT: EMIT vp<[[VP10:%[0-9]+]]> = extractelement vp<[[VP4]]>, vp<%last.active.lane> ; CHECK-NEXT: Successor(s): ir-bb<exit> ; CHECK-EMPTY: ; CHECK-NEXT: ir-bb<exit>: -; CHECK-NEXT: IR %red.lcssa = phi i32 [ %red, %loop ] (extra operand: vp<[[VP6]]> from middle.block) +; CHECK-NEXT: IR %red.lcssa = phi i32 [ %red, %loop ] (extra operand: vp<[[VP10]]> from middle.block) ; CHECK-NEXT: No successors ; CHECK-NEXT: } ; _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
