https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/206947
None >From 08ed6143c0ab992e53ee57fdac5d1f1524262022 Mon Sep 17 00:00:00 2001 From: Matt Arsenault <[email protected]> Date: Wed, 1 Jul 2026 12:48:04 +0200 Subject: [PATCH] DAG: Preserve poison in all-undef build_vector/concat_vectors folds --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 16 ++++++++++++---- llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll | 1 - 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index fa0b564b25006..28160dcd8100a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -6934,8 +6934,12 @@ static SDValue FoldBUILD_VECTOR(const SDLoc &DL, EVT VT, "Incorrect element count in BUILD_VECTOR!"); // BUILD_VECTOR of UNDEFs is UNDEF. - if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); })) - return DAG.getUNDEF(VT); + bool AllPoison = true; + if (llvm::all_of(Ops, [&AllPoison](SDValue Op) { + AllPoison &= Op.getOpcode() == ISD::POISON; + return Op.isUndef(); + })) + return AllPoison ? DAG.getPOISON(VT) : DAG.getUNDEF(VT); // BUILD_VECTOR of seq extract/insert from the same vector + type is Identity. SDValue IdentitySrc; @@ -6976,8 +6980,12 @@ static SDValue foldCONCAT_VECTORS(const SDLoc &DL, EVT VT, return Ops[0]; // Concat of UNDEFs is UNDEF. - if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); })) - return DAG.getUNDEF(VT); + bool AllPoison = true; + if (llvm::all_of(Ops, [&AllPoison](SDValue Op) { + AllPoison &= Op.getOpcode() == ISD::POISON; + return Op.isUndef(); + })) + return AllPoison ? DAG.getPOISON(VT) : DAG.getUNDEF(VT); // Scan the operands and look for extract operations from a single source // that correspond to insertion at the same location via this concatenation: diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll index bf6babede48b5..3f11691def1b5 100644 --- a/llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll +++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll @@ -29,7 +29,6 @@ define i8 @test_vector_reduce_or_v2i8(<2 x i8> %v) { ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-SDAG-NEXT: v_and_b32_e32 v0, 0xff, v0 -; GFX7-SDAG-NEXT: v_or_b32_e32 v0, 0xff00, v0 ; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] ; ; GFX7-GISEL-LABEL: test_vector_reduce_or_v2i8: _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
