llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-tablegen @llvm/pr-subscribers-llvm-mc Author: Alexis Engelke (aengelke) <details> <summary>Changes</summary> This moves the large SubTypeKV arrays to .rodata, as they no longer contain the key pointers that need to be relocated. Additionally, remove the largely redundant CPUNames arrays and integrate the AArch64 aliases into the sorted string table. There was really no need to introduce these 17 kiB arrays solely for including AArch64 aliases in help output.... (added in b6c22a4) --- Patch is 20.88 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/207580.diff 9 Files Affected: - (modified) llvm/include/llvm/CodeGen/TargetSubtargetInfo.h (+2-1) - (modified) llvm/include/llvm/MC/MCSubtargetInfo.h (+17-12) - (modified) llvm/lib/CodeGen/TargetSubtargetInfo.cpp (+1-1) - (modified) llvm/lib/MC/MCSubtargetInfo.cpp (+11-13) - (modified) llvm/unittests/CodeGen/MFCommon.inc (+4-4) - (modified) llvm/unittests/CodeGen/MachineInstrTest.cpp (+1-1) - (modified) llvm/unittests/CodeGen/MachineOperandTest.cpp (+1-1) - (modified) llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp (+1-1) - (modified) llvm/utils/TableGen/SubtargetEmitter.cpp (+43-62) ``````````diff diff --git a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h index 8f13b0efaa068..efd88fe012fd7 100644 --- a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h +++ b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h @@ -17,6 +17,7 @@ #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringRef.h" +#include "llvm/ADT/StringTable.h" #include "llvm/CodeGen/MacroFusion.h" #include "llvm/CodeGen/PBQPRAConstraint.h" #include "llvm/CodeGen/SchedulerRegistry.h" @@ -69,7 +70,7 @@ struct SchedRegion; class LLVM_ABI TargetSubtargetInfo : public MCSubtargetInfo { protected: // Can only create subclasses... TargetSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, - StringRef FS, ArrayRef<StringRef> PN, + StringRef FS, StringTable PN, ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD, const MCSchedModel *PSM, const MCWriteProcResEntry *WPR, diff --git a/llvm/include/llvm/MC/MCSubtargetInfo.h b/llvm/include/llvm/MC/MCSubtargetInfo.h index 493c017830da4..2d1053b2113c0 100644 --- a/llvm/include/llvm/MC/MCSubtargetInfo.h +++ b/llvm/include/llvm/MC/MCSubtargetInfo.h @@ -16,6 +16,7 @@ #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/StringRef.h" +#include "llvm/ADT/StringTable.h" #include "llvm/MC/MCInstrItineraries.h" #include "llvm/MC/MCSchedule.h" #include "llvm/Support/Compiler.h" @@ -75,25 +76,24 @@ struct SubtargetFeatureKVStorage { /// Used to provide key value pairs for feature and CPU bit flags. struct SubtargetSubTypeKV { -private: - const char *Key; ///< K-V key string - -public: + uint16_t KeyStrOff; + unsigned SchedModelIdx; FeatureBitArray Implies; ///< K-V bit mask FeatureBitArray TuneImplies; ///< K-V bit mask - unsigned SchedModelIdx; - constexpr SubtargetSubTypeKV(const char *Key, FeatureBitArray Implies, + constexpr SubtargetSubTypeKV(uint16_t KeyStrOff, FeatureBitArray Implies, FeatureBitArray TuneImplies, unsigned SchedModelIdx) - : Key(Key), Implies(Implies), TuneImplies(TuneImplies), - SchedModelIdx(SchedModelIdx) {} + : KeyStrOff(KeyStrOff), SchedModelIdx(SchedModelIdx), Implies(Implies), + TuneImplies(TuneImplies) {} // Because of relative string offsets, this type is not copyable. SubtargetSubTypeKV(const SubtargetSubTypeKV &) = delete; SubtargetSubTypeKV &operator=(const SubtargetSubTypeKV &) = delete; - const char *key() const { return Key; } + const char *key() const { + return reinterpret_cast<const char *>(this) + KeyStrOff; + } /// Compare routine for std::lower_bound bool operator<(StringRef S) const { return StringRef(key()) < S; } @@ -104,6 +104,12 @@ struct SubtargetSubTypeKV { } }; +template <size_t NumSubTypes, size_t SubTypeStrTabSize> +struct SubtargetSubTypeKVStorage { + SubtargetSubTypeKV SubTypes[NumSubTypes]; + char Strings[SubTypeStrTabSize]; +}; + //===----------------------------------------------------------------------===// /// /// Generic base class for all target subtargets. @@ -112,7 +118,7 @@ class LLVM_ABI MCSubtargetInfo { Triple TargetTriple; std::string CPU; // CPU being targeted. std::string TuneCPU; // CPU being tuned for. - ArrayRef<StringRef> ProcNames; // Processor list, including aliases + StringTable ProcNames; // Processor list, including aliases ArrayRef<SubtargetFeatureKV> ProcFeatures; // Processor feature list ArrayRef<SubtargetSubTypeKV> ProcDesc; // Processor descriptions const MCSchedModel *ProcSchedModels; ///< Processor scheduling models. @@ -132,8 +138,7 @@ class LLVM_ABI MCSubtargetInfo { public: MCSubtargetInfo(const MCSubtargetInfo &) = default; MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, - StringRef FS, ArrayRef<StringRef> PN, - ArrayRef<SubtargetFeatureKV> PF, + StringRef FS, StringTable PN, ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD, const MCSchedModel *PSM, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, diff --git a/llvm/lib/CodeGen/TargetSubtargetInfo.cpp b/llvm/lib/CodeGen/TargetSubtargetInfo.cpp index 56757962277b5..727eff7ddce58 100644 --- a/llvm/lib/CodeGen/TargetSubtargetInfo.cpp +++ b/llvm/lib/CodeGen/TargetSubtargetInfo.cpp @@ -17,7 +17,7 @@ using namespace llvm; TargetSubtargetInfo::TargetSubtargetInfo( const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, - ArrayRef<StringRef> PN, ArrayRef<SubtargetFeatureKV> PF, + StringTable PN, ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD, const MCSchedModel *PSM, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, diff --git a/llvm/lib/MC/MCSubtargetInfo.cpp b/llvm/lib/MC/MCSubtargetInfo.cpp index 2b6875185c06e..be10860ef56ff 100644 --- a/llvm/lib/MC/MCSubtargetInfo.cpp +++ b/llvm/lib/MC/MCSubtargetInfo.cpp @@ -102,7 +102,7 @@ static size_t getLongestEntryLength(ArrayRef<SubtargetFeatureKV> Table) { return MaxLen; } -static size_t getLongestEntryLength(ArrayRef<StringRef> Table) { +static size_t getLongestEntryLength(StringTable Table) { size_t MaxLen = 0; for (StringRef I : Table) MaxLen = std::max(MaxLen, I.size()); @@ -110,8 +110,7 @@ static size_t getLongestEntryLength(ArrayRef<StringRef> Table) { } /// Display help for feature and mcpu choices. -static void Help(ArrayRef<StringRef> CPUNames, - ArrayRef<SubtargetFeatureKV> FeatTable) { +static void Help(StringTable CPUNames, ArrayRef<SubtargetFeatureKV> FeatTable) { // the static variable ensures that the help information only gets // printed once even though a target machine creates multiple subtargets static bool PrintOnce = false; @@ -125,7 +124,7 @@ static void Help(ArrayRef<StringRef> CPUNames, // Print the CPU table. errs() << "Available CPUs for this target:\n\n"; - for (auto &CPUName : CPUNames) { + for (auto &CPUName : drop_begin(CPUNames)) { // Skip apple-latest, as that's only meant to be used in // disassemblers/debuggers, and we don't want normal code to be built with // it as an -mcpu= @@ -150,7 +149,7 @@ static void Help(ArrayRef<StringRef> CPUNames, } /// Display help for mcpu choices only -static void cpuHelp(ArrayRef<StringRef> CPUNames) { +static void cpuHelp(StringTable CPUNames) { // the static variable ensures that the help information only gets // printed once even though a target machine creates multiple subtargets static bool PrintOnce = false; @@ -160,7 +159,7 @@ static void cpuHelp(ArrayRef<StringRef> CPUNames) { // Print the CPU table. errs() << "Available CPUs for this target:\n\n"; - for (auto &CPU : CPUNames) { + for (auto &CPU : llvm::drop_begin(CPUNames)) { // Skip apple-latest, as that's only meant to be used in // disassemblers/debuggers, and we don't want normal code to be built with // it as an -mcpu= @@ -179,7 +178,7 @@ static void cpuHelp(ArrayRef<StringRef> CPUNames) { static FeatureBitset getFeatures(MCSubtargetInfo &STI, StringRef CPU, StringRef TuneCPU, StringRef FS, - ArrayRef<StringRef> ProcNames, + StringTable ProcNames, ArrayRef<SubtargetSubTypeKV> ProcDesc, ArrayRef<SubtargetFeatureKV> ProcFeatures) { SubtargetFeatures Features(FS); @@ -257,12 +256,11 @@ void MCSubtargetInfo::setDefaultFeatures(StringRef CPU, StringRef TuneCPU, } MCSubtargetInfo::MCSubtargetInfo( - const Triple &TT, StringRef C, StringRef TC, StringRef FS, - ArrayRef<StringRef> PN, ArrayRef<SubtargetFeatureKV> PF, - ArrayRef<SubtargetSubTypeKV> PD, const MCSchedModel *PSM, - const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, - const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, - const unsigned *FP) + const Triple &TT, StringRef C, StringRef TC, StringRef FS, StringTable PN, + ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD, + const MCSchedModel *PSM, const MCWriteProcResEntry *WPR, + const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, + const InstrStage *IS, const unsigned *OC, const unsigned *FP) : TargetTriple(TT), CPU(std::string(C)), TuneCPU(std::string(TC)), ProcNames(PN), ProcFeatures(PF), ProcDesc(PD), ProcSchedModels(PSM), WriteProcResTable(WPR), WriteLatencyTable(WL), ReadAdvanceTable(RA), diff --git a/llvm/unittests/CodeGen/MFCommon.inc b/llvm/unittests/CodeGen/MFCommon.inc index d773471a8e157..b85ab0777c0db 100644 --- a/llvm/unittests/CodeGen/MFCommon.inc +++ b/llvm/unittests/CodeGen/MFCommon.inc @@ -88,7 +88,7 @@ public: class BogusSubtarget : public TargetSubtargetInfo { public: BogusSubtarget(TargetMachine &TM) - : TargetSubtargetInfo(Triple(""), "", "", "", {}, {}, {}, nullptr, + : TargetSubtargetInfo(Triple(""), "", "", "", "", {}, {}, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr), FL(), TL(TM, *this) {} @@ -143,9 +143,9 @@ public: AsmInfo = std::make_unique<MCAsmInfo>(Options.MCOptions); MRI = std::make_unique<MCRegisterInfo>(); STI = std::make_unique<MCSubtargetInfo>( - Triple(""), "", "", "", ArrayRef<StringRef>{}, - ArrayRef<SubtargetFeatureKV>{}, ArrayRef<SubtargetSubTypeKV>{}, nullptr, - nullptr, nullptr, nullptr, nullptr, nullptr, nullptr); + Triple(""), "", "", "", StringTable{""}, ArrayRef<SubtargetFeatureKV>{}, + ArrayRef<SubtargetSubTypeKV>{}, nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr); } ~BogusTargetMachine() override = default; diff --git a/llvm/unittests/CodeGen/MachineInstrTest.cpp b/llvm/unittests/CodeGen/MachineInstrTest.cpp index bdb6a1dfaf42f..0ec589c45af08 100644 --- a/llvm/unittests/CodeGen/MachineInstrTest.cpp +++ b/llvm/unittests/CodeGen/MachineInstrTest.cpp @@ -43,7 +43,7 @@ std::unique_ptr<MCContext> createMCContext(const MCAsmInfo &AsmInfo) { Triple TheTriple(/*ArchStr=*/"", /*VendorStr=*/"", /*OSStr=*/"", /*EnvironmentStr=*/"elf"); static MCRegisterInfo MRI; - static const MCSubtargetInfo STI(TheTriple, "", "", "", {}, {}, {}, nullptr, + static const MCSubtargetInfo STI(TheTriple, "", "", "", "", {}, {}, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr); return std::make_unique<MCContext>(TheTriple, AsmInfo, MRI, STI, nullptr, diff --git a/llvm/unittests/CodeGen/MachineOperandTest.cpp b/llvm/unittests/CodeGen/MachineOperandTest.cpp index bff2f86be726a..21254599a227c 100644 --- a/llvm/unittests/CodeGen/MachineOperandTest.cpp +++ b/llvm/unittests/CodeGen/MachineOperandTest.cpp @@ -353,7 +353,7 @@ TEST(MachineOperandTest, PrintMCSymbol) { MCAsmInfo MAI(MCOptions); MCRegisterInfo MRI; Triple T = Triple("unknown-unknown-unknown"); - MCSubtargetInfo STI(T, "", "", "", {}, {}, {}, nullptr, nullptr, nullptr, + MCSubtargetInfo STI(T, "", "", "", "", {}, {}, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr); MCContext Ctx(T, MAI, MRI, STI); MCSymbol *Sym = Ctx.getOrCreateSymbol("foo"); diff --git a/llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp b/llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp index 912056b1ca560..f922d7c7b9a15 100644 --- a/llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp +++ b/llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp @@ -38,7 +38,7 @@ static std::string AArch64InstPrinterTestPrintAlignedLabel(uint64_t value) { MCAsmInfo MAI(MCOptions); MCInstrInfo MII; MCRegisterInfo MRI; - MCSubtargetInfo STI(Triple(""), "", "", "", {}, {}, {}, nullptr, nullptr, + MCSubtargetInfo STI(Triple(""), "", "", "", "", {}, {}, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr); MCContext Ctx(Triple(""), MAI, MRI, STI); MCInst MI; diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp index faf36300ada57..0baef48a23a84 100644 --- a/llvm/utils/TableGen/SubtargetEmitter.cpp +++ b/llvm/utils/TableGen/SubtargetEmitter.cpp @@ -82,8 +82,8 @@ class SubtargetEmitter : TargetFeaturesEmitter { struct MCDescInfo { unsigned NumFeatures; unsigned FeatureStrTabSize; - unsigned NumNames; unsigned NumProcs; + unsigned SubTypeStrTabSize; }; MCDescInfo emitMCDesc(raw_ostream &OS, const FeatureMapTy &FeatureMap); void emitTargetDesc(raw_ostream &OS); @@ -92,8 +92,8 @@ class SubtargetEmitter : TargetFeaturesEmitter { std::pair<unsigned, unsigned> featureKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap); - unsigned cpuKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap); - unsigned cpuNames(raw_ostream &OS); + std::pair<unsigned, unsigned> cpuKeyValues(raw_ostream &OS, + const FeatureMapTy &FeatureMap); void formItineraryStageString(const std::string &Names, const Record *ItinData, std::string &ItinString, unsigned &NStages); @@ -253,40 +253,6 @@ SubtargetEmitter::featureKeyValues(raw_ostream &OS, return {FeatureList.size(), StrTab.size() + 1}; } -unsigned SubtargetEmitter::cpuNames(raw_ostream &OS) { - // Begin processor name table. - OS << "// Sorted array of names of CPU subtypes, including aliases.\n" - << "extern const llvm::StringRef " << Target << "Names[] = {\n"; - - std::vector<const Record *> ProcessorList = - Records.getAllDerivedDefinitions("Processor"); - - std::vector<const Record *> ProcessorAliasList = - Records.getAllDerivedDefinitionsIfDefined("ProcessorAlias"); - - SmallVector<StringRef> Names; - Names.reserve(ProcessorList.size() + ProcessorAliasList.size()); - - for (const Record *Processor : ProcessorList) { - StringRef Name = Processor->getValueAsString("Name"); - Names.push_back(Name); - } - - for (const Record *Rec : ProcessorAliasList) { - auto Name = Rec->getValueAsString("Name"); - Names.push_back(Name); - } - - llvm::sort(Names); - llvm::interleave( - Names, OS, [&](StringRef Name) { OS << '"' << Name << '"'; }, ",\n"); - - // End processor name table. - OS << "};\n"; - - return Names.size(); -} - static void checkDuplicateCPUFeatures(StringRef CPUName, ArrayRef<const Record *> Features, ArrayRef<const Record *> TuneFeatures) { @@ -315,13 +281,29 @@ static void checkDuplicateCPUFeatures(StringRef CPUName, // CPUKeyValues - Emit data of all the subtarget processors. Used by command // line. // -unsigned SubtargetEmitter::cpuKeyValues(raw_ostream &OS, - const FeatureMapTy &FeatureMap) { +std::pair<unsigned, unsigned> +SubtargetEmitter::cpuKeyValues(raw_ostream &OS, + const FeatureMapTy &FeatureMap) { // Gather and sort processor information std::vector<const Record *> ProcessorList = Records.getAllDerivedDefinitions("Processor"); llvm::sort(ProcessorList, LessRecordFieldName()); + // In the string table, include the aliases as well. + std::vector<const Record *> ProcessorAliasList = + Records.getAllDerivedDefinitionsIfDefined("ProcessorAlias"); + SmallVector<StringRef> Names; + Names.reserve(ProcessorList.size() + ProcessorAliasList.size()); + for (const Record *Processor : ProcessorList) + Names.push_back(Processor->getValueAsString("Name")); + for (const Record *Rec : ProcessorAliasList) + Names.push_back(Rec->getValueAsString("Name")); + llvm::sort(Names); + + StringToOffsetTable StrTab; + for (StringRef Name : Names) + StrTab.GetOrAddStringOffset(Name); + // Note that unlike `FeatureKeyValues`, here we do not need to check for // duplicate processors, since that is already done when the SubtargetEmitter // constructor calls `getSchedModels` to build a `CodeGenSchedModels` object, @@ -329,10 +311,11 @@ unsigned SubtargetEmitter::cpuKeyValues(raw_ostream &OS, // Begin processor table. OS << "// Sorted (by key) array of values for CPU subtype.\n" - << "extern const llvm::SubtargetSubTypeKV " << Target - << "SubTypeKV[] = {\n"; + << "extern const llvm::SubtargetSubTypeKVStorage< " << ProcessorList.size() + << ", " << (StrTab.size() + 1) << "> " << Target + << "SubTypeKVStorage = {\n {\n"; - for (const Record *Processor : ProcessorList) { + for (const auto &[Idx, Processor] : enumerate(ProcessorList)) { StringRef Name = Processor->getValueAsString("Name"); ConstRecVec FeatureList = Processor->getValueAsListOfDefs("Features"); ConstRecVec TuneFeatureList = @@ -342,9 +325,8 @@ unsigned SubtargetEmitter::cpuKeyValues(raw_ostream &OS, // features. checkDuplicateCPUFeatures(Name, FeatureList, TuneFeatureList); - // Emit as "{ "cpu", "description", 0, { f1 , f2 , ... fn } },". - OS << " { " - << "\"" << Name << "\", "; + OS << " { sizeof(SubtargetSubTypeKV) * " << (ProcessorList.size() - Idx) + << " + " << StrTab.GetOrAddStringOffset(Name) << ", "; printFeatureMask(OS, FeatureList, FeatureMap); OS << ", "; @@ -354,10 +336,13 @@ unsigned SubtargetEmitter::cpuKeyValues(raw_ostream &OS, OS << ", " << SchedModels.getModelIndexForProc(Processor) << " },\n"; } + OS << " },\n"; + StrTab.EmitString(OS); + // End processor table. OS << "};\n"; - return ProcessorList.size(); + return {ProcessorList.size(), StrTab.size() + 1}; } // @@ -2049,7 +2034,7 @@ void SubtargetEmitter::emitGenMCSubtargetInfo(raw_ostream &OS) { << "GenMCSubtargetInfo : public MCSubtargetInfo {\n"; OS << " " << Target << "GenMCSubtargetInfo(const Triple &TT,\n" << " StringRef CPU, StringRef TuneCPU, StringRef FS,\n" - << " ArrayRef<StringRef> PN,\n" + << " StringTable PN,\n" << " ArrayRef<SubtargetFeatureKV> PF,\n" << " ArrayRef<SubtargetSubTypeKV> PD,\n" << " const MCSchedModel *PSM,\n" @@ -2118,9 +2103,9 @@ SubtargetEmitter::emitMCDesc(raw_ostream &OS, const FeatureMapTy &FeatureMap) { OS << "\n"; emitSchedModel(OS); OS << "\n"; - Res.NumProcs = cpuKeyValues(OS, FeatureMap); - OS << "\n"; - Res.NumNames = cpuNames(OS); + auto [NumProcs, SubTypeStrTabSize] = cpuKeyValues(OS, FeatureMap); + Res.NumProcs = NumProcs; + Res.SubTypeStrTabSize = SubTypeStrTabSize; OS << "\n"; // MCInstrInfo initialization routine. @@ -2134,16 +2119,13 @@ SubtargetEmitter::emitMCDesc(raw_ostream &OS, const FeatureMapTy &FeatureMap) { << " TuneCPU = AArch64::resolveCPUAlias(TuneCPU);\n"; OS << " return new " << Target << "GenMCSubtargetInfo(TT, CPU, TuneCPU, FS, "; - if (Res.NumNames) - OS << Target << "Names, "; - else - OS << "{}, "; + OS << "StringTable(" << Target << "SubTypeKVStorage.Strings), "; if (Res.NumFeatures) OS << Target << "FeatureKVStorage.Features, "; else OS << "{}, "; if (Res.NumProcs) - OS << Target << "SubTypeKV, " << Target << "SchedModels, "; + OS << Target << "SubTypeKVStorage.SubTypes, " << Target << "SchedModels, "; else OS << "{}, nullptr, "; OS << '\n'; @@ -2248,7 +2230,9 @@ void SubtargetEmitter::emitCtor(raw_ostream &OS, MCDescInfo DescInfo) { << DescInfo.NumFeatures << ", " << DescInfo.FeatureStrTabSize << "> " << Target << "FeatureKVStorage;\n"; } - OS << "extern const llvm::SubtargetSubTypeKV " << Target << "SubTypeKV[];\n"; + OS << "extern const llvm::SubtargetSubTypeKVStorage<" << DescInfo.NumProcs + << ", " << DescInfo.SubTypeStrTabSize << "> " << Target + << "SubTypeKVStorage;\n"; OS << "extern const llvm::MCSchedModel " << Target << "SchedModels[];\n"; OS << "extern const llvm::MCWriteProcResEntry " << Tar... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/207580 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
