llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-llvm-transforms Author: Matt Arsenault (arsenm) <details> <summary>Changes</summary> Mechanically migrate the command-line target spelling on llc/opt RUN lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu. Co-Authored-By: Claude <noreply@<!-- -->anthropic.com> (Claude-Opus-4.8) --- Patch is 164.07 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/209117.diff 98 Files Affected: - (modified) llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll (+10-10) - (modified) llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll (+10-10) - (modified) llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll (+4-4) - (modified) llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll (+4-4) - (modified) llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll (+8-8) - (modified) llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll (+8-8) - (modified) llvm/test/CodeGen/AMDGPU/fpenv.ll (+10-10) - (modified) llvm/test/CodeGen/AMDGPU/fpext-free.ll (+8-8) - (modified) llvm/test/CodeGen/AMDGPU/fpext.f16.ll (+5-5) - (modified) llvm/test/CodeGen/AMDGPU/fpext.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/fpow.ll (+7-7) - (modified) llvm/test/CodeGen/AMDGPU/fptoi.i128.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll (+8-8) - (modified) llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll (+8-8) - (modified) llvm/test/CodeGen/AMDGPU/fptosi.f16.ll (+4-4) - (modified) llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll (+8-8) - (modified) llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll (+8-8) - (modified) llvm/test/CodeGen/AMDGPU/fptoui.f16.ll (+4-4) - (modified) llvm/test/CodeGen/AMDGPU/fptoui_uitofp.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll (+16-16) - (modified) llvm/test/CodeGen/AMDGPU/fptrunc.ll (+13-13) - (modified) llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/fract.f64.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/fract.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll (+5-5) - (modified) llvm/test/CodeGen/AMDGPU/frame-index.mir (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/freeze-binary.ll (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/freeze.ll (+14-14) - (modified) llvm/test/CodeGen/AMDGPU/frem.ll (+11-11) - (modified) llvm/test/CodeGen/AMDGPU/frexp-constant-fold.ll (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/fshl-scalar-shift-zero.ll (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/fshl.ll (+5-5) - (modified) llvm/test/CodeGen/AMDGPU/fshr.ll (+8-8) - (modified) llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll (+4-4) - (modified) llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll (+4-4) - (modified) llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/fsub.f16.ll (+5-5) - (modified) llvm/test/CodeGen/AMDGPU/fsub.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/fsub64.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/ftrunc.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/function-alignment.ll (+9-9) - (modified) llvm/test/CodeGen/AMDGPU/function-args-inreg.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/function-args.ll (+5-5) - (modified) llvm/test/CodeGen/AMDGPU/function-call-relocs.ll (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/function-esm2-prologue-epilogue.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/function-resource-usage.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/function-returns.ll (+5-5) - (modified) llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/gcn-reg-pressure-true16-integer-overflow.mir (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/gds-allocation.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/gds-atomic.ll (+4-4) - (modified) llvm/test/CodeGen/AMDGPU/gds-unsupported.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/gep-address-space.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/gep-flags-stack-offsets.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll (+5-5) - (modified) llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/gfx10plus-wavefront-sgpr-count.ll (+6-6) - (modified) llvm/test/CodeGen/AMDGPU/gfx11-sgpr-hazard-latency.mir (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll (+14-14) - (modified) llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/gfx942-hazards.mir (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/global-address.ll (+8-8) - (modified) llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll (+5-5) - (modified) llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll (+4-4) - (modified) llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-no-rtn.ll (+6-6) - (modified) llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-rtn.ll (+4-4) - (modified) llvm/test/CodeGen/AMDGPU/global-atomic-scan.ll (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll (+13-13) - (modified) llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll (+11-11) - (modified) llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll (+11-11) - (modified) llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll (+11-11) - (modified) llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics.ll (+5-5) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll (+4-4) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll (+1-1) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan_fp.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll (+2-2) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll (+12-12) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll (+12-12) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll (+12-12) - (modified) llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll (+12-12) ``````````diff diff --git a/llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll b/llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll index fd4046a70687d..6e5ec14404a28 100644 --- a/llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll +++ b/llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll @@ -1,15 +1,15 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=amdgcn -mcpu=verde | FileCheck %s -check-prefix=SI -; RUN: llc < %s -mtriple=amdgcn -mcpu=hawaii | FileCheck %s -check-prefix=GFX7 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s -check-prefix=GFX10 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1030 | FileCheck %s -check-prefix=GFX1030 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 | FileCheck %s -check-prefix=GFX1100 +; RUN: llc < %s -mtriple=amdgpu6.01 | FileCheck %s -check-prefix=SI +; RUN: llc < %s -mtriple=amdgpu7.01 | FileCheck %s -check-prefix=GFX7 +; RUN: llc < %s -mtriple=amdgpu10.10 | FileCheck %s -check-prefix=GFX10 +; RUN: llc < %s -mtriple=amdgpu10.30 | FileCheck %s -check-prefix=GFX1030 +; RUN: llc < %s -mtriple=amdgpu11.00 | FileCheck %s -check-prefix=GFX1100 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=verde | FileCheck %s -check-prefix=G_SI -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=hawaii | FileCheck %s -check-prefix=G_GFX7 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s -check-prefix=G_GFX10 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx1030 | FileCheck %s -check-prefix=G_GFX1030 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx1100 | FileCheck %s -check-prefix=G_GFX1100 +; RUN: llc < %s -global-isel -mtriple=amdgpu6.01 | FileCheck %s -check-prefix=G_SI +; RUN: llc < %s -global-isel -mtriple=amdgpu7.01 | FileCheck %s -check-prefix=G_GFX7 +; RUN: llc < %s -global-isel -mtriple=amdgpu10.10 | FileCheck %s -check-prefix=G_GFX10 +; RUN: llc < %s -global-isel -mtriple=amdgpu10.30 | FileCheck %s -check-prefix=G_GFX1030 +; RUN: llc < %s -global-isel -mtriple=amdgpu11.00 | FileCheck %s -check-prefix=G_GFX1100 declare float @llvm.amdgcn.raw.ptr.buffer.atomic.fmin.f32(float, ptr addrspace(8), i32, i32, i32 immarg) declare float @llvm.amdgcn.raw.ptr.buffer.atomic.fmax.f32(float, ptr addrspace(8), i32, i32, i32 immarg) diff --git a/llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll b/llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll index 0962399ec0678..1954484302bd1 100644 --- a/llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll +++ b/llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll @@ -1,15 +1,15 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=amdgcn -mcpu=verde | FileCheck %s -check-prefix=SI -; RUN: llc < %s -mtriple=amdgcn -mcpu=hawaii | FileCheck %s -check-prefix=GFX7 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s -check-prefix=GFX10 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1030 | FileCheck %s -check-prefix=GFX1030 -; RUN: not --crash llc < %s -mtriple=amdgcn -mcpu=gfx1100 2>&1 | FileCheck %s -check-prefix=GFX11-ERR +; RUN: llc < %s -mtriple=amdgpu6.01 | FileCheck %s -check-prefix=SI +; RUN: llc < %s -mtriple=amdgpu7.01 | FileCheck %s -check-prefix=GFX7 +; RUN: llc < %s -mtriple=amdgpu10.10 | FileCheck %s -check-prefix=GFX10 +; RUN: llc < %s -mtriple=amdgpu10.30 | FileCheck %s -check-prefix=GFX1030 +; RUN: not --crash llc < %s -mtriple=amdgpu11.00 2>&1 | FileCheck %s -check-prefix=GFX11-ERR -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=verde | FileCheck %s -check-prefix=G_SI -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=hawaii | FileCheck %s -check-prefix=G_GFX7 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s -check-prefix=G_GFX10 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx1030 | FileCheck %s -check-prefix=G_GFX1030 -; RUN: not llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx1100 2>&1 | FileCheck %s -check-prefix=G_GFX11-ERR +; RUN: llc < %s -global-isel -mtriple=amdgpu6.01 | FileCheck %s -check-prefix=G_SI +; RUN: llc < %s -global-isel -mtriple=amdgpu7.01 | FileCheck %s -check-prefix=G_GFX7 +; RUN: llc < %s -global-isel -mtriple=amdgpu10.10 | FileCheck %s -check-prefix=G_GFX10 +; RUN: llc < %s -global-isel -mtriple=amdgpu10.30 | FileCheck %s -check-prefix=G_GFX1030 +; RUN: not llc < %s -global-isel -mtriple=amdgpu11.00 2>&1 | FileCheck %s -check-prefix=G_GFX11-ERR ; image_atomic_fmin and image_atomic_fmax was removed on gfx11+ ; GFX11-ERR: LLVM ERROR: Cannot select: intrinsic %llvm.amdgcn.image.atomic.f diff --git a/llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll b/llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll index 74e19229a3f78..d0815c583e5bd 100644 --- a/llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll +++ b/llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "s_setreg_imm32_b32" --version 6 -; RUN: llc < %s -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 | FileCheck %s -check-prefixes=GCN,GFX12,GFX12-SDAG -; RUN: llc < %s -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 | FileCheck %s -check-prefixes=GCN,GFX12,GFX12-GISEL -; RUN: llc < %s -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 | FileCheck %s -check-prefixes=GCN,GFX1250,GFX1250-SDAG -; RUN: llc < %s -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 | FileCheck %s -check-prefixes=GCN,GFX1250,GFX1250-GISEL +; RUN: llc < %s -global-isel=0 -mtriple=amdgpu12.00 | FileCheck %s -check-prefixes=GCN,GFX12,GFX12-SDAG +; RUN: llc < %s -global-isel=1 -mtriple=amdgpu12.00 | FileCheck %s -check-prefixes=GCN,GFX12,GFX12-GISEL +; RUN: llc < %s -global-isel=0 -mtriple=amdgpu12.50 | FileCheck %s -check-prefixes=GCN,GFX1250,GFX1250-SDAG +; RUN: llc < %s -global-isel=1 -mtriple=amdgpu12.50 | FileCheck %s -check-prefixes=GCN,GFX1250,GFX1250-GISEL declare float @llvm.amdgcn.flat.atomic.fmin.num.f32.p1.f32(ptr %ptr, float %data) declare float @llvm.amdgcn.flat.atomic.fmax.num.f32.p1.f32(ptr %ptr, float %data) diff --git a/llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll b/llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll index d9d102550a2bf..b06352fc14608 100644 --- a/llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll +++ b/llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "s_setreg_imm32_b32" --version 6 -; RUN: llc < %s -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 | FileCheck %s -check-prefixes=GCN +; RUN: llc < %s -global-isel=1 -mtriple=amdgpu12.00 | FileCheck %s -check-prefixes=GCN declare float @llvm.amdgcn.global.atomic.fmin.num.f32.p1.f32(ptr addrspace(1) %ptr, float %data) declare float @llvm.amdgcn.global.atomic.fmax.num.f32.p1.f32(ptr addrspace(1) %ptr, float %data) diff --git a/llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll b/llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll index a2c21bfc5c7cc..dba3ea8b89405 100644 --- a/llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll +++ b/llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx600 < %s | FileCheck -check-prefixes=GFX6 %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX8 %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-TRUE16 %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-FAKE16 %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgpu6.00 < %s | FileCheck -check-prefixes=GFX6 %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgpu8.02 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX8 %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgpu11.00 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-TRUE16 %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgpu11.00 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-FAKE16 %s ; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=r600 -mcpu=cypress < %s | FileCheck -check-prefixes=CYPRESS %s declare i16 @llvm.convert.to.fp16.f32(float) nounwind readnone diff --git a/llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll b/llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll index a4727d8b1eb51..163945c3cc9e5 100644 --- a/llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll +++ b/llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx90a -amdgpu-atomic-optimizer-strategy=None | FileCheck %s -check-prefix=GFX90A -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx942 -amdgpu-atomic-optimizer-strategy=None | FileCheck %s -check-prefix=GFX942 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1250 -amdgpu-atomic-optimizer-strategy=None | FileCheck %s -check-prefix=GFX1250 +; RUN: llc < %s -mtriple=amdgpu9.0a -amdgpu-atomic-optimizer-strategy=None | FileCheck %s -check-prefix=GFX90A +; RUN: llc < %s -mtriple=amdgpu9.42 -amdgpu-atomic-optimizer-strategy=None | FileCheck %s -check-prefix=GFX942 +; RUN: llc < %s -mtriple=amdgpu12.50 -amdgpu-atomic-optimizer-strategy=None | FileCheck %s -check-prefix=GFX1250 declare double @llvm.amdgcn.struct.buffer.atomic.fadd.f64(double, <4 x i32>, i32, i32, i32, i32 immarg) declare double @llvm.amdgcn.struct.ptr.buffer.atomic.fadd.f64(double, ptr addrspace(8), i32, i32, i32, i32 immarg) diff --git a/llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll b/llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll index 2d38924a28da4..17990326be7a9 100644 --- a/llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll +++ b/llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll @@ -1,13 +1,13 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=amdgcn -mcpu=verde | FileCheck %s -check-prefix=SI -; RUN: llc < %s -mtriple=amdgcn -mcpu=hawaii | FileCheck %s -check-prefix=GFX7 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s -check-prefix=GFX10 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1030 | FileCheck %s -check-prefix=GFX1030 +; RUN: llc < %s -mtriple=amdgpu6.01 | FileCheck %s -check-prefix=SI +; RUN: llc < %s -mtriple=amdgpu7.01 | FileCheck %s -check-prefix=GFX7 +; RUN: llc < %s -mtriple=amdgpu10.10 | FileCheck %s -check-prefix=GFX10 +; RUN: llc < %s -mtriple=amdgpu10.30 | FileCheck %s -check-prefix=GFX1030 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=verde | FileCheck %s -check-prefix=G_SI -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=hawaii | FileCheck %s -check-prefix=G_GFX7 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s -check-prefix=G_GFX10 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx1030 | FileCheck %s -check-prefix=G_GFX1030 +; RUN: llc < %s -global-isel -mtriple=amdgpu6.01 | FileCheck %s -check-prefix=G_SI +; RUN: llc < %s -global-isel -mtriple=amdgpu7.01 | FileCheck %s -check-prefix=G_GFX7 +; RUN: llc < %s -global-isel -mtriple=amdgpu10.10 | FileCheck %s -check-prefix=G_GFX10 +; RUN: llc < %s -global-isel -mtriple=amdgpu10.30 | FileCheck %s -check-prefix=G_GFX1030 declare double @llvm.amdgcn.raw.buffer.atomic.fmin.f64(double, <4 x i32>, i32, i32, i32 immarg) declare double @llvm.amdgcn.raw.buffer.atomic.fmax.f64(double, <4 x i32>, i32, i32, i32 immarg) diff --git a/llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll b/llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll index b8363da4e4887..a6791f7ddf9ea 100644 --- a/llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll +++ b/llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll @@ -1,13 +1,13 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=amdgcn -mcpu=verde | FileCheck %s -check-prefix=SI -; RUN: llc < %s -mtriple=amdgcn -mcpu=hawaii | FileCheck %s -check-prefix=GFX7 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s -check-prefix=GFX10 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1030 | FileCheck %s -check-prefix=GFX1030 +; RUN: llc < %s -mtriple=amdgpu6.01 | FileCheck %s -check-prefix=SI +; RUN: llc < %s -mtriple=amdgpu7.01 | FileCheck %s -check-prefix=GFX7 +; RUN: llc < %s -mtriple=amdgpu10.10 | FileCheck %s -check-prefix=GFX10 +; RUN: llc < %s -mtriple=amdgpu10.30 | FileCheck %s -check-prefix=GFX1030 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=verde | FileCheck %s -check-prefix=G_SI -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=hawaii | FileCheck %s -check-prefix=G_GFX7 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s -check-prefix=G_GFX10 -; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx1030 | FileCheck %s -check-prefix=G_GFX1030 +; RUN: llc < %s -global-isel -mtriple=amdgpu6.01 | FileCheck %s -check-prefix=G_SI +; RUN: llc < %s -global-isel -mtriple=amdgpu7.01 | FileCheck %s -check-prefix=G_GFX7 +; RUN: llc < %s -global-isel -mtriple=amdgpu10.10 | FileCheck %s -check-prefix=G_GFX10 +; RUN: llc < %s -global-isel -mtriple=amdgpu10.30 | FileCheck %s -check-prefix=G_GFX1030 declare double @llvm.amdgcn.raw.ptr.buffer.atomic.fmin.f64(double, ptr addrspace(8), i32, i32, i32 immarg) declare double @llvm.amdgcn.raw.ptr.buffer.atomic.fmax.f64(double, ptr addrspace(8), i32, i32, i32 immarg) diff --git a/llvm/test/CodeGen/AMDGPU/fpenv.ll b/llvm/test/CodeGen/AMDGPU/fpenv.ll index 80d5c9ad0cebf..870a05a32a49b 100644 --- a/llvm/test/CodeGen/AMDGPU/fpenv.ll +++ b/llvm/test/CodeGen/AMDGPU/fpenv.ll @@ -1,14 +1,14 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple=amdgcn -global-isel=0 -mcpu=tahiti < %s | FileCheck -check-prefixes=GFX6-SDAG %s -; RUN: llc -mtriple=amdgcn -global-isel=1 -mcpu=tahiti < %s | FileCheck -check-prefixes=GFX6-ISEL %s -; RUN: llc -mtriple=amdgcn -global-isel=0 -mcpu=fiji < %s | FileCheck -check-prefixes=GFX8-SDAG %s -; RUN: llc -mtriple=amdgcn -global-isel=1 -mcpu=fiji < %s | FileCheck -check-prefixes=GFX8-ISEL %s -; RUN: llc -mtriple=amdgcn -global-isel=0 -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9-SDAG %s -; RUN: llc -mtriple=amdgcn -global-isel=1 -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9-ISEL %s -; RUN: llc -mtriple=amdgcn -global-isel=0 -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10-SDAG %s -; RUN: llc -mtriple=amdgcn -global-isel=1 -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10-ISEL %s -; RUN: llc -mtriple=amdgcn -amdgpu-enable-delay-alu=0 -global-isel=0 -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX11-SDAG %s -; RUN: llc -mtriple=amdgcn -amdgpu-enable-delay-alu=0 -global-isel=1 -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX11-ISEL %s +; RUN: llc -mtriple=amdgpu6.00 -global-isel=0 < %s | FileCheck -check-prefixes=GFX6-SDAG %s +; RUN: llc -mtriple=amdgpu6.00 -global-isel=1 < %s | FileCheck -check-prefixes=GFX6-ISEL %s +; RUN: llc -mtriple=amdgpu8.03 -global-isel=0 < %s | FileCheck -check-prefixes=GFX8-SDAG %s +; RUN: llc -mtriple=amdgpu8.03 -global-isel=1 < %s | FileCheck -check-prefixes=GFX8-ISEL %s +; RUN: llc -mtriple=amdgpu9.00 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9-SDAG %s +; RUN: llc -mtriple=amdgpu9.00 -global-isel=1 < %s | FileCheck -check-prefixes=GFX9-ISEL %s +; RUN: llc -mtriple=amdgpu10.30 -global-isel=0 < %s | FileCheck -check-prefixes=GFX10-SDAG %s +; RUN: llc -mtriple=amdgpu10.30 -global-isel=1 < %s | FileCheck -check-prefixes=GFX10-ISEL %s +; RUN: llc -mtriple=amdgpu11.00 -amdgpu-enable-delay-alu=0 -global-isel=0 < %s | FileCheck -check-prefixes=GFX11-SDAG %s +; RUN: llc -mtriple=amdgpu11.00 -amdgpu-enable-delay-alu=0 -global-isel=1 < %s | FileCheck -check-prefixes=GFX11-ISEL %s declare i64 @llvm.get.fpenv.i64() diff --git a/llvm/test/CodeGen/AMDGPU/fpext-free.ll b/llvm/test/CodeGen/AMDGPU/fpext-free.ll index 10a925f9df687..d3cc8d752310a 100644 --- a/llvm/test/CodeGen/AMDGPU/fpext-free.ll +++ b/llvm/test/CodeGen/AMDGPU/fpext-free.ll @@ -1,12 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 -; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-TRUE16,GFX11-F32FLUSH,GFX11-F32FLUSH-TRUE16 %s -; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-FAKE16,GFX11-F32FLUSH,GFX11-F32FLUSH-FAKE16 %s -; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-TRUE16,GFX11-F32DENORM,GFX11-F32DENORM-TRUE16 %s -; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-FAKE16,GFX11-F32DENORM,GFX11-F32DENORM-FAKE16 %s -; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX9-F32FLUSH %s -; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX9-F32DENORM %s -; RUN: llc -mtriple=amdgcn -mcpu=gfx803 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX8,GFX8-F32FLUSH %s -; RUN: llc -mtriple=amdgcn -mcpu=gfx803 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX8,GFX8-F32DENORM %s +; RUN: llc -mtriple=amdgpu11.00 -mattr=+real-true16 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-TRUE16,GFX11-F32FLUSH,GFX11-F32FLUSH-TRUE16 %s +; RUN: llc -mtriple=amdgpu11.00 -mattr=-real-true16 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-FAKE16,GFX11-F32FLUSH,GFX11-F32FLUSH-FAKE16 %s +; RUN: llc -mtriple=amdgpu11.00 -mattr=+real-true16 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-TRUE16,GFX11-F32DENORM,GFX11-F32DENORM-TRUE16 %s +; RUN: llc -mtriple=amdgpu11.00 -mattr=-real-true16 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-FAKE16,GFX11-F32DENORM,GFX11-F32DENORM-FAKE16 %s +; RUN: llc -mtriple=amdgpu9.00 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX9-F32FLUSH %s +; RUN: llc -mtriple=amdgpu9.00 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX9-F32DENORM %s +; RUN: llc -mtriple=amdgpu8.03 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX8,GFX8-F32FLUSH %s +; RUN: llc -mtriple=amdgpu8.03 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX8,GFX8-F32DENORM %s ; fold (fadd (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), z) define float @fadd_fpext_fmul_f16_to_f32(half %x, half %y, float %z) #0 { diff --git a/llvm/test/CodeGen/AMDGPU/fpext.f16.ll b/llvm/test/CodeGen/AMDGPU/fpext.f16.ll index fc7d87e92e1b3..d29a425e2a1c6 100644 --- a/llvm/test/CodeGen/AMDGPU/fpext.f16.ll +++ b/llvm/test/CodeGen/AMDGPU/fpext.f16.ll @@ -1,9 +1,9 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope --check-prefixes=SI %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -mattr=-flat-for-global < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope --check-prefixes=GFX89,VI %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -mattr=-flat-for-global < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope --check-prefixes=GFX89,GFX9 %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=+re... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/209117 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
