================
@@ -1090,18 +1093,30 @@ bool PPCMIPeephole::simplifyCode() {
// chain used to deduce sign extension to eliminate the 'extsw' will
// need to be promoted to 64-bit pseudo instructions when the 'extsw'
// is eliminated.
- TII->promoteInstr32To64ForElimEXTSW(NarrowReg, MRI, 0, LV);
-
LLVM_DEBUG(dbgs() << "Removing redundant sign-extension\n");
- Register TmpReg =
- MF->getRegInfo().createVirtualRegister(&PPC::G8RCRegClass);
- BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::IMPLICIT_DEF),
- TmpReg);
- BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::INSERT_SUBREG),
- MI.getOperand(0).getReg())
- .addReg(TmpReg)
- .addReg(NarrowReg)
- .addImm(PPC::sub_32);
+
+ if (NarrowSubReg) {
----------------
arsenm wrote:
There's already an isSignExtended check above here
https://github.com/llvm/llvm-project/pull/208052
_______________________________________________
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
