================
@@ -32,10 +32,14 @@ namespace {
/// Wrapper around extendRegister to ensure we extend to a full 32-bit
register.
static Register extendRegisterMin32(CallLowering::ValueHandler &Handler,
- Register ValVReg, const CCValAssign &VA) {
- if (VA.getLocVT().getSizeInBits() < 32) {
+ Register ValVReg, const CCValAssign &VA,
+ bool isPhyRegSGPR, const GCNSubtarget &ST)
{
+ if (VA.getLocVT().getSizeInBits() < 32 &&
+ (isPhyRegSGPR || !ST.useRealTrue16Insts())) {
----------------
arsenm wrote:
Shouldn't the type be known from the CCValAssign, and avoid the new reference
to ST.useRealTrue16Insts? also shouldn't require isPhyRegSGPR
https://github.com/llvm/llvm-project/pull/218463
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