https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/230997
>From dd56edbcf1413ac62b4850dcb0ed4c0bc93b22e6 Mon Sep 17 00:00:00 2001 From: Matt Arsenault <[email protected]> Date: Sun, 11 Oct 2026 02:33:30 -0700 Subject: [PATCH] AMDGPU: Move R600 subtarget features to R600Features.td Split the R600 SubtargetFeature definitions and R600FrontendVisibleFeatures out of R600Processors.td, mirroring GCNFeatures.td. Co-authored-by: Claude Opus 5.5 <[email protected]> --- llvm/lib/Target/AMDGPU/R600.td | 1 + llvm/lib/Target/AMDGPU/R600Features.td | 80 ++++++++++++++++++++++++ llvm/lib/Target/AMDGPU/R600Processors.td | 73 --------------------- 3 files changed, 81 insertions(+), 73 deletions(-) create mode 100644 llvm/lib/Target/AMDGPU/R600Features.td diff --git a/llvm/lib/Target/AMDGPU/R600.td b/llvm/lib/Target/AMDGPU/R600.td index bdfaac9f42ea7..fffebff5a1417 100644 --- a/llvm/lib/Target/AMDGPU/R600.td +++ b/llvm/lib/Target/AMDGPU/R600.td @@ -35,6 +35,7 @@ def ALU_NULL : FuncUnit; include "AMDGPUFeatures.td" include "R600Schedule.td" +include "R600Features.td" include "R600Processors.td" include "R600InstrInfo.td" include "AMDGPUInstrInfo.td" diff --git a/llvm/lib/Target/AMDGPU/R600Features.td b/llvm/lib/Target/AMDGPU/R600Features.td new file mode 100644 index 0000000000000..e1a22ff9aa062 --- /dev/null +++ b/llvm/lib/Target/AMDGPU/R600Features.td @@ -0,0 +1,80 @@ +//===-- R600Features.td - R600 Feature Definitions ---------*- tablegen -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +class SubtargetFeatureFetchLimit <string Value> : + SubtargetFeature <"fetch"#Value, + "TexVTXClauseSize", + Value, + "Limit the maximum number of fetches in a clause to "#Value +>; + +def FeatureR600ALUInst : SubtargetFeature<"R600ALUInst", + "HasR600ALUInst", + "false", + "Older version of ALU instructions encoding" +>; + +def FeatureFetchLimit8 : SubtargetFeatureFetchLimit <"8">; +def FeatureFetchLimit16 : SubtargetFeatureFetchLimit <"16">; + +def FeatureVertexCache : SubtargetFeature<"HasVertexCache", + "HasVertexCache", + "true", + "Specify use of dedicated vertex cache" +>; + +def FeatureCaymanISA : SubtargetFeature<"caymanISA", + "HasCaymanISA", + "true", + "Use Cayman ISA" +>; + +def FeatureCFALUBug : SubtargetFeature<"cfalubug", + "HasCFALUBug", + "true", + "GPU has CF_ALU bug" +>; + +def FeatureMadMacF32Insts : SubtargetFeature<"mad-mac-f32-insts", + "HasMadMacF32Insts", + "true", + "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions" +>; + +class R600SubtargetFeatureGeneration <string Value, string FeatureName, + list<SubtargetFeature> Implies> : + SubtargetFeatureGeneration <Value, FeatureName, "R600Subtarget", Implies>; + +def FeatureR600 : R600SubtargetFeatureGeneration<"R600", "r600", + [FeatureR600ALUInst, FeatureFetchLimit8, FeatureMadMacF32Insts] +>; + +def FeatureR700 : R600SubtargetFeatureGeneration<"R700", "r700", + [FeatureFetchLimit16, FeatureMadMacF32Insts] +>; + +def FeatureEvergreen : R600SubtargetFeatureGeneration<"EVERGREEN", "evergreen", + [FeatureFetchLimit16, FeatureAddressableLocalMemorySize32768, + FeatureLDSAllocGranularity256, + FeatureLDSEncodingGranularity256, + FeatureMadMacF32Insts] +>; + +def FeatureNorthernIslands : R600SubtargetFeatureGeneration<"NORTHERN_ISLANDS", + "northern-islands", + [FeatureFetchLimit16, FeatureWavefrontSize64, + FeatureAddressableLocalMemorySize32768, + FeatureLDSAllocGranularity256, + FeatureLDSEncodingGranularity256, + FeatureMadMacF32Insts] +>; + +// The subset of R600 SubtargetFeatures exposed outside of the backend. +def R600FrontendVisibleFeatures { + list<SubtargetFeature> Features = [FeatureFMA]; +} diff --git a/llvm/lib/Target/AMDGPU/R600Processors.td b/llvm/lib/Target/AMDGPU/R600Processors.td index a72c367fd74a2..cbaf5cd03b9cf 100644 --- a/llvm/lib/Target/AMDGPU/R600Processors.td +++ b/llvm/lib/Target/AMDGPU/R600Processors.td @@ -6,74 +6,6 @@ // //===----------------------------------------------------------------------===// -class SubtargetFeatureFetchLimit <string Value> : - SubtargetFeature <"fetch"#Value, - "TexVTXClauseSize", - Value, - "Limit the maximum number of fetches in a clause to "#Value ->; - -def FeatureR600ALUInst : SubtargetFeature<"R600ALUInst", - "HasR600ALUInst", - "false", - "Older version of ALU instructions encoding" ->; - -def FeatureFetchLimit8 : SubtargetFeatureFetchLimit <"8">; -def FeatureFetchLimit16 : SubtargetFeatureFetchLimit <"16">; - -def FeatureVertexCache : SubtargetFeature<"HasVertexCache", - "HasVertexCache", - "true", - "Specify use of dedicated vertex cache" ->; - -def FeatureCaymanISA : SubtargetFeature<"caymanISA", - "HasCaymanISA", - "true", - "Use Cayman ISA" ->; - -def FeatureCFALUBug : SubtargetFeature<"cfalubug", - "HasCFALUBug", - "true", - "GPU has CF_ALU bug" ->; - -def FeatureMadMacF32Insts : SubtargetFeature<"mad-mac-f32-insts", - "HasMadMacF32Insts", - "true", - "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions" ->; - -class R600SubtargetFeatureGeneration <string Value, string FeatureName, - list<SubtargetFeature> Implies> : - SubtargetFeatureGeneration <Value, FeatureName, "R600Subtarget", Implies>; - -def FeatureR600 : R600SubtargetFeatureGeneration<"R600", "r600", - [FeatureR600ALUInst, FeatureFetchLimit8, FeatureMadMacF32Insts] ->; - -def FeatureR700 : R600SubtargetFeatureGeneration<"R700", "r700", - [FeatureFetchLimit16, FeatureMadMacF32Insts] ->; - -def FeatureEvergreen : R600SubtargetFeatureGeneration<"EVERGREEN", "evergreen", - [FeatureFetchLimit16, FeatureAddressableLocalMemorySize32768, - FeatureLDSAllocGranularity256, - FeatureLDSEncodingGranularity256, - FeatureMadMacF32Insts] ->; - -def FeatureNorthernIslands : R600SubtargetFeatureGeneration<"NORTHERN_ISLANDS", - "northern-islands", - [FeatureFetchLimit16, FeatureWavefrontSize64, - FeatureAddressableLocalMemorySize32768, - FeatureLDSAllocGranularity256, - FeatureLDSEncodingGranularity256, - FeatureMadMacF32Insts] ->; - //===----------------------------------------------------------------------===// // Radeon HD 2000/3000 Series (R600). //===----------------------------------------------------------------------===// @@ -173,8 +105,3 @@ def : R600ProcessorModel<"cayman", R600_VLIW4_Itin, def : R600ProcessorModel<"turks", R600_VLIW5_Itin, [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug] >; - -// The subset of R600 SubtargetFeatures exposed outside of the backend. -def R600FrontendVisibleFeatures { - list<SubtargetFeature> Features = [FeatureFMA]; -} _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
