https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/231017
Avoid parsing the heavyweight AMDGPU.td to generate the TargetParser
inc files. Only include the minimal subtarget information required.
llvm-min-tblgen -gen-amdgpu-target-def (Release+asserts):
wall instructions:u peak RSS .td deps
AMDGPU.td 12.16 s 79.49 G 909 MB 76
AMDGPUTargetParserDef.td 0.01 s 0.056 G 7 MB 10
R600.td 0.38 s 1.59 G 92 MB 57
R600TargetParserDef.td <0.01 s 0.008 G 6 MB 10
Co-authored-by: Claude Opus 5.5 <[email protected]>
---
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>From da91380608ad5e57c10e137c646a7658008ce625 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <[email protected]>
Date: Sun, 11 Oct 2026 02:33:30 -0700
Subject: [PATCH] AMDGPU: Use minimal tablegen inputs for TargetParser
Avoid parsing the heavyweight AMDGPU.td to generate the TargetParser
inc files. Only include the minimal subtarget information required.
llvm-min-tblgen -gen-amdgpu-target-def (Release+asserts):
wall instructions:u peak RSS .td deps
AMDGPU.td 12.16 s 79.49 G 909 MB 76
AMDGPUTargetParserDef.td 0.01 s 0.056 G 7 MB 10
R600.td 0.38 s 1.59 G 92 MB 57
R600TargetParserDef.td <0.01 s 0.008 G 6 MB 10
Co-authored-by: Claude Opus 5.5 <[email protected]>
---
llvm/include/llvm/TargetParser/CMakeLists.txt | 4 ++--
llvm/lib/Target/AMDGPU/AMDGPUTargetParserDef.td | 13 +++++++++++++
llvm/lib/Target/AMDGPU/R600TargetParserDef.td | 17 +++++++++++++++++
.../llvm/include/llvm/TargetParser/BUILD.gn | 4 ++--
.../bazel/llvm-project-overlay/llvm/BUILD.bazel | 4 ++--
5 files changed, 36 insertions(+), 6 deletions(-)
create mode 100644 llvm/lib/Target/AMDGPU/AMDGPUTargetParserDef.td
create mode 100644 llvm/lib/Target/AMDGPU/R600TargetParserDef.td
diff --git a/llvm/include/llvm/TargetParser/CMakeLists.txt
b/llvm/include/llvm/TargetParser/CMakeLists.txt
index af26db48f2132..8bdf7ad5ae10a 100644
--- a/llvm/include/llvm/TargetParser/CMakeLists.txt
+++ b/llvm/include/llvm/TargetParser/CMakeLists.txt
@@ -10,10 +10,10 @@ tablegen(LLVM RISCVTargetParserDef.inc
-gen-riscv-target-def EXTRA_INCLUDES ${PR
set(LLVM_TARGET_DEFINITIONS ${PROJECT_SOURCE_DIR}/lib/Target/PowerPC/PPC.td)
tablegen(LLVM PPCGenTargetFeatures.inc -gen-target-features EXTRA_INCLUDES
${PROJECT_SOURCE_DIR}/lib/Target/PowerPC)
-set(LLVM_TARGET_DEFINITIONS ${PROJECT_SOURCE_DIR}/lib/Target/AMDGPU/R600.td)
+set(LLVM_TARGET_DEFINITIONS
${PROJECT_SOURCE_DIR}/lib/Target/AMDGPU/R600TargetParserDef.td)
tablegen(LLVM R600TargetParserDef.inc -gen-amdgpu-target-def EXTRA_INCLUDES
${PROJECT_SOURCE_DIR}/lib/Target/AMDGPU)
-set(LLVM_TARGET_DEFINITIONS ${PROJECT_SOURCE_DIR}/lib/Target/AMDGPU/AMDGPU.td)
+set(LLVM_TARGET_DEFINITIONS
${PROJECT_SOURCE_DIR}/lib/Target/AMDGPU/AMDGPUTargetParserDef.td)
tablegen(LLVM AMDGPUTargetParserDef.inc -gen-amdgpu-target-def EXTRA_INCLUDES
${PROJECT_SOURCE_DIR}/lib/Target/AMDGPU)
# This covers all of the tablegen calls above.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetParserDef.td
b/llvm/lib/Target/AMDGPU/AMDGPUTargetParserDef.td
new file mode 100644
index 0000000000000..a42e48e07bc5c
--- /dev/null
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetParserDef.td
@@ -0,0 +1,13 @@
+//===-- AMDGPUTargetParserDef.td - AMDGPU TargetParser -----*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+include "llvm/Target/TargetSubtarget.td"
+include "AMDGPUFeatures.td"
+include "GCNFeatures.td"
+include "AMDGPUSchedModels.td"
+include "GCNProcessors.td"
diff --git a/llvm/lib/Target/AMDGPU/R600TargetParserDef.td
b/llvm/lib/Target/AMDGPU/R600TargetParserDef.td
new file mode 100644
index 0000000000000..2c85692c2af92
--- /dev/null
+++ b/llvm/lib/Target/AMDGPU/R600TargetParserDef.td
@@ -0,0 +1,17 @@
+//===-- R600TargetParserDef.td - R600 TargetParser ---------*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+include "llvm/Target/TargetSubtarget.td"
+
+def NullALU : InstrItinClass;
+def ALU_NULL : FuncUnit;
+
+include "AMDGPUFeatures.td"
+include "R600Schedule.td"
+include "R600Features.td"
+include "R600Processors.td"
diff --git a/llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
b/llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
index db4158ae7a3ca..082a1af8529d1 100644
--- a/llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
@@ -31,14 +31,14 @@ tablegen("RISCVTargetParserDef") {
tablegen("R600TargetParserDef") {
visibility = [ ":gen" ]
args = [ "-gen-amdgpu-target-def" ]
- td_file = "//llvm/lib/Target/AMDGPU/R600.td"
+ td_file = "//llvm/lib/Target/AMDGPU/R600TargetParserDef.td"
tblgen_target = "//llvm/utils/TableGen:llvm-min-tblgen"
}
tablegen("AMDGPUTargetParserDef") {
visibility = [ ":gen" ]
args = [ "-gen-amdgpu-target-def" ]
- td_file = "//llvm/lib/Target/AMDGPU/AMDGPU.td"
+ td_file = "//llvm/lib/Target/AMDGPU/AMDGPUTargetParserDef.td"
tblgen_target = "//llvm/utils/TableGen:llvm-min-tblgen"
}
diff --git a/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
b/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
index 79ac50b300d87..f2db3a9307df6 100644
--- a/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+++ b/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
@@ -1769,7 +1769,7 @@ gentbl_cc_library(
name = "AMDGPUTargetParserDefGen",
tbl_outs = {"include/llvm/TargetParser/AMDGPUTargetParserDef.inc":
["-gen-amdgpu-target-def"]},
tblgen = ":llvm-min-tblgen",
- td_file = "lib/Target/AMDGPU/AMDGPU.td",
+ td_file = "lib/Target/AMDGPU/AMDGPUTargetParserDef.td",
deps = [
":AMDGPUTargetTdFiles",
":CommonTargetTdFiles",
@@ -1780,7 +1780,7 @@ gentbl_cc_library(
name = "R600TargetParserDefGen",
tbl_outs = {"include/llvm/TargetParser/R600TargetParserDef.inc":
["-gen-amdgpu-target-def"]},
tblgen = ":llvm-min-tblgen",
- td_file = "lib/Target/AMDGPU/R600.td",
+ td_file = "lib/Target/AMDGPU/R600TargetParserDef.td",
deps = [
":AMDGPUTargetTdFiles",
":CommonTargetTdFiles",
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