http://bugs.llvm.org/show_bug.cgi?id=32063
Eric Christopher <[email protected]> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |RESOLVED
Resolution|--- |FIXED
CC| |[email protected]
--- Comment #1 from Eric Christopher <[email protected]> ---
Believe this is fixed thusly:
commit e225b39cd4cdf3b62d5395ab3a6753a8503dbff7
Author: Guozhi Wei <[email protected]>
Date: Thu Mar 2 21:07:59 2017 +0000
[PPC] Fix code generation for bswap(int32) followed by store16
This patch fixes pr32063.
Current code in PPCTargetLowering::PerformDAGCombine can transform
bswap
store
into a single PPCISD::STBRX instruction. but it doesn't consider the case
that the operand size of bswap may be larger than store size. When it occurs,
we need 2 modifications,
1 For the last operand of PPCISD::STBRX, we should not use
DAG.getValueType(N->getOperand(1).getValueType()), instead we should use
cast<StoreSDNode>(N)->getMemoryVT().
2 Before PPCISD::STBRX, we need to shift the original operand of bswap to
the right side.
Differential Revision: https://reviews.llvm.org/D30362
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296811
91177308-0d34-0410-b5e6-96231b3b80d8
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